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TMS320F28035: F28035 JTAG Hardware

David Wang60
Intellectual 980 points

Part Number: TMS320F28035
Other Parts Discussed in Thread: DRV8303EVM

I am looking at putting a JTAG header on the F28035 to use with the XDS110 debug probe. I am using the DRV8303EVM as a reference and it uses an on-board emulator. Based on what I an see, there are two switches, one on the TRSTn line and one for the GPIO34 and TDO lines. For the GPIO34 and TDO lines, there are 3.3K resistors to GND on the microcontroller side then switches that have 820 ohm pullups to 3.3V. When in standalone boot mode, it's primarily going to boot from flash so TDO and GPIO34 should be HIGH. When I connect the XDS110 probe, is there going to be conflicts with TDO and GPIO34 tied high? Do I need the 3.3k resistors to GND?

Thanks

-David

  • 0
    Intellectual 980 points
    Also, does the microcontroller/board required to be power or can the XDS110 supply power to the microcontroller to re-flash (similar to how the MSP430 work)?
  • 0
    TI__Expert 5940 points
    Hello,

    I am writing to let you know that a C2000 team member has been assigned to this post and should be answering shortly.

    Regards,
    Elizabeth
  • 0 in reply to Elizabeth Joy
    TI__Guru 57255 points

    Hi David,

    First of all, I'll refer you to the datasheet section for the F28035 device labelled "Emulator Connection Without Signal Buffering for the MCU".  This should help guide you.  For GPIO34 & TDO you should put the resistors (pull-ups or pull-downs) in order to get the device to boot the way you need.  Something like 3.3K-4.7K should be adequate. 

    The design you are referring to cannot really make assumptions on how you the user needs to use the device.  So the switch offers different options - and the 820R pullup overpowers the 3.3Kohm resistor. 

    When a JTAG emulator is connected, it'll take precedence - with the emulator connected to the device it is possible to make the device act like it's cold booting, but the interactions is through the emulator.  Note that TDO is an output from the C2000 device and that the device only looks at the status of GPIO34 & TDO at startup.

    Hopefully this helps!


    Thank you,
    Brett

  • 0 in reply to Brett Larimore
    Intellectual 980 points
    Hi Brett:

    Thanks for the explanation. Also there was a note in the datasheet (4.2 Signal Descriptions) that explain the JTAG + GPIO34 has the possibility of glitching during power up if the on board VREG is used. Would this be an issue at start up that could cause erratic behavior in the boot mode?

    I have pulled up GPIO34 and TDO so that it always boots to GETMODE. Would the glitches on the pins deviate from this?

    If the VREG was disabled, the glitch problem would still exist unless you power sequence the VDD (1.8V) before the VDDIO (3.3V)?

    Any insight would be great.

    Thanks
  • 0 in reply to David Wang60
    TI__Guru 57255 points

    Hi David,

    The glitch, if it occurs, will happen prior to the C2000's supplies being in their valid range - the range specified in the device datasheet. 

    As a result, any glitching should occur well before the device begins to run code & before the boot-mode pins' status (GPIO34 & TDO) is read.

    The glitch is mainly a concern for (& was documented for) situations where one of these C2000 pins is controlling something and a glitch would cause an undesirable effect.  An example is if one of these GPIOs were controlling a FET, a GPIO glitch could cause shoot-through in certain designs. 

    Hopefully this helps!


    Thank you,
    Brett

  • 0 in reply to Brett Larimore
    Intellectual 980 points

    Thanks, that's exactly what I wanted to know!