Other Parts Discussed in Thread: SYSBIOS
I have used sys/bios hwi in c28 core, as the ti.sysbios.family.c28.Hwi document says: "PIE interrupts must clear the CPU acknowledge bit for their respective PIE block before further interrupts from that block can occur. The SYS/BIOS 6 dispatcher (used by interrupts created using create) takes care of this, however this differs from DSP/BIOS 5, in which the application is expected to acknowledge the interrupt."
So, if I want to use sys/bios hwi in arm m3 core , do I need to clear the ISR flag in my ISR function? or the arm m3 dispatcher will clear it automatically as the same as c28 ?