CCSv4 Compiling F28235 Code with .ebss and .bss in External RAM

mjones

Other Parts Discussed in Thread: TMS320F2812

We are using CCSv4 with BIOS 5.41 for a F28235 flash project.

We are trying to run a flash project with our C variables stored in external RAM. My understanding of how to do this is to specify the .bss and.ebss to be stored in external RAM using the Memory Section manager in DSP/BIOS graphical configuration tool.

Then I believe that we need to enable the XINTF in the gel file.

We have done this and when we try to program the DSP we get an error writing to FLASH. This error happens to be when attempting to write the .trc. Error is shown below:

C28xx: Flash operation timed out waiting for the algorithm to complete. Operation cancelled.

C28xx: Trouble Writing Memory Block at 0x3224b8 on Page 0 of Length 0x3

Cannot write to target

What direction should we turn? Do we need to manually copy the .bss and .ebss sections to External ram similar to the way the .trc is done? This sounds wrong to me.

Any suggestions will be appreciated.

over 15 years ago

0 AartiG over 15 years ago

TI__Guru**** 173310 points

The .bss and .ebss sections should be fine in external RAM. Did you make sure to copy the .trcdata section from Flash to RAM prior to reaching main(), as described in the app note "Running an Application from Internal Flash Memory on the TMS320F28xxx DSP":
http://focus.ti.com/general/docs/litabsmultiplefilelist.tsp?literatureNumber=spra958i

Does the error go away if the .bss and .ebss sections are moved to internal RAM?

0 mjones over 15 years ago in reply to AartiG

Intellectual 880 points

We do copy the .trcdata section from Flash to RAM prior to reaching main() as instructed in spra958i.

If we place .bss and .ebss in internal RAM we have no issues. It is only when we move them to external ram that we have problems.

I am learning more about the GEL file and my guess is that we are not enabling the XINTF properly, however I have no idea how this affects the .trcdata and causes problems with it.

We are currently enabling the XINTF in the GEL file in the OnReset() function as shown below;

OnReset(int nErrorCode)

{

C28x_Mode();

Unlock_CSM();

ADC_Cal();

XINTF_Enable();

}

Any ideas?

0 AartiG over 15 years ago in reply to mjones

TI__Guru**** 173310 points

Which specific version of CCS4 are you using? There were some issues with certain earlier versions of CCS4 regarding Flash programming, but I'm not sure if they're related to what you're seeing. Could you try 4.1.3 if you're not using it already? I don't see why the placement of .ebss would have an effect on writing to certain parts of Flash though. I'll try to duplicate this by modifying SPRA958.

0 mjones over 15 years ago in reply to AartiG

Intellectual 880 points

I will upgrade and try CCS 4.1.3 for Monday morning. Thanks for the input.

0 mjones over 15 years ago in reply to mjones

Intellectual 880 points

I have upgraded my CCS to 4.1.3.00038 and I still get an error programming Flash when the programmer is writing the .trcdata section (the same error as before).

We do not have any errors during compile. I have noticed something possibly suspicious in the *.map file. the .trcdata section of the *.map file shows a gap of one word before the next listed section without listing a hole to account for that gap. I don't know if this is a violation or not, but I noticed that all of the other mapped sections within a memory block seemed to account for every word by mapping holes where needed between data placed in memory. See .trcdata below.

secureRamFuncs

* 0 00322478 0000001f RUN ADDR = 0000883c

00322478 0000001f Init_28235.obj (secureRamFuncs)

.gblinit 0 00322497 00000021

00322497 00000021 PM4_28235_Flashcfg.obj (.gblinit)

.trcdata 0 003224b8 00000003 RUN ADDR = 0000886e

003224b8 00000003 PM4_28235_Flashcfg.obj (.trcdata)

.pinit 0 003224bc 00000006

003224bc 00000002 rtdxx.lib : buffer1.o28L (.pinit)

003224be 00000002 : rtdx_mon.o28L (.pinit)

003224c0 00000002 --HOLE-- [fill = 0]

Any suggestions?

0 AartiG over 15 years ago in reply to mjones

TI__Guru**** 173310 points

I am unable to duplicate the flash programming error even after placing .ebss section in external memory. I tried it with a modified version of SPRA958i. There are some other issues I am running into, and I have not debugged them far enough, but I can at least program the code into Flash without errors with CCS 4.1.3.

Have you tried modifying the section allocations in the BIOS .tcf file to rearrange the code such that the gap you mentioned above in the .trcdata section does not occur? And if so, does the programming error still occur?

I am moving this post to the C2000 forum to see if they have any more suggestions to add.

0 mjones over 15 years ago in reply to AartiG

Intellectual 880 points

I have also modified the SPRA958i and I get a successful programming of the Flash, but I am getting a code hang during _BIOS_init:, specifically TSK_setup:. The code seems to be loading an invalid data page, not really sure, then trapping.

Looks like it loads a data page of 0x8004 which is unmapped. This smells like a config issue because the value is hard-coded in the disassembly view.

I am trying to spot the difference in the .tcf and .cmd between this modified project and our project. My guess is that we have a configuration issue also.

I will try and move the .trcdata around and see what happens.

Thanks for the help.

0 mjones over 15 years ago in reply to mjones

Intellectual 880 points

I have moved the .trcdata around by putting it in different parts of the FLASH and each time the programming of the FLASH fails at the address of the .trcdata.

Still playing spot the difference with our project configurations and the SPRA958i sample project, converted to F28235.

0 mjones over 15 years ago in reply to mjones

Intellectual 880 points

Any new information? Still struggling to crack this.

0 mjones over 15 years ago in reply to mjones

Intellectual 880 points

Awfully quiet out there...

Still working on this issue. Our development is at a near halt. I would have thought this is a very common thing to do, to put .bss and .ebss into external RAM. Not sure why there seems to be so much trouble.

Anybody?

0 OlegSterlegov over 14 years ago in reply to mjones

Prodigy 230 points

So, i have exactly the same problem with xds100 + f28016.

.trcdata section not programming...

0 mjones over 14 years ago in reply to OlegSterlegov

Intellectual 880 points

I will post a more complete account of what we did to fix our code in a bit, but for the .trcdata section programming failure:

Ensure that the code that initializes flash is compiled to run from "secure" RAM.

Ensure that you are copying the .trcdata section from Flash to RAM before main().

This is detailed in http://focus.ti.com/general/docs/litabsmultiplefilelist.tsp?literatureNumber=spra958i. Section 3.2 and 4.3 should tell you what you need to know.

0 Liu XiaoChuan over 14 years ago in reply to mjones

Prodigy 50 points

I meet a question to demostrate Running an Application from Internal Flash Memory on the TMS320F2812 DSP by using SPRA958h in CCS3.3。I want to use SPRA958i (the lastest version in CCS3.3)to test it again, but I can't find SPRA958i in www.ti.com. Could you mail it to me ?Thanks, my mail address:scqxlxc@sina.com.

scqxlxc

0 mjones over 14 years ago in reply to Liu XiaoChuan

Intellectual 880 points

There is a new SPRA958 released (version J).

Try this link.

http://focus.ti.com/mcu/docs/litabsmultiplefilelist.tsp?sectionId=96&tabId=1502&literatureNumber=spra958j&docCategoryId=1&familyId=1523

0 Lori Heustess over 14 years ago in reply to mjones

TI__Guru* 92140 points

Just a side note, all TI lit and zips can be accessed with www.ti.com/lit/<zip>/spru<without the revision>. This generic link will work even when the revision changes.

www.ti.com/lit/spra958

www.ti.com/lit/zip/spra958

Cheers

Lori

0 Jigar Patel93027 over 12 years ago in reply to Lori Heustess

Intellectual 750 points

Hi Lori,

I am having similar but little different problem.

My program works fine on Ram. Now I am trying to run my program from Flash and in order to do that I have imported all the important .cmd and .asm files.

It is giving me error related to excess memory size of .ebss. My .ebss was 380 RAMM0. because I am using )x0ae0 space, I am trying to use RAML6 which is 1000.

It compiles correctly but giving me some wwarning after flashing. (Initialized RAM warning). Main thing is I can not run my program stand alone.

Can you please help.

Fullscreen 6305.RAM error.txt Download

/*############################################################################

 FILE:   DSP2833x_nonBIOS_flash.cmd

 DESCRIPTION:  Linker allocation for all sections. 
############################################################################
 Author: Tim Love
 Release Date: 	March 2008
############################################################################*/


MEMORY
{
PAGE 0:    /* Program Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */

	ZONE0       : origin = 0x004000, length = 0x001000     /* XINTF zone 0 */
	RAM_L0L1L2L3: origin = 0x008000, length = 0x004000	   /* on-chip RAM */
//	RAM_L0L1L2L3: origin = 0x008000, length = 0x003000	   /* on-chip RAM */
   	OTP         : origin = 0x380400, length = 0x000400     /* on-chip OTP */
    ZONE6       : origin = 0x100000, length = 0x100000     /* XINTF zone 6 */ 
    ZONE7A      : origin = 0x200000, length = 0x00FC00     /* XINTF zone 7 - program space */
   	FLASHH      : origin = 0x300000, length = 0x008000     /* on-chip FLASH */
    FLASHG      : origin = 0x308000, length = 0x008000     /* on-chip FLASH */
    FLASHF      : origin = 0x310000, length = 0x008000     /* on-chip FLASH */
    FLASHE      : origin = 0x318000, length = 0x008000     /* on-chip FLASH */
    FLASHD      : origin = 0x320000, length = 0x008000     /* on-chip FLASH */
    FLASHC      : origin = 0x328000, length = 0x008000     /* on-chip FLASH */
    FLASHA      : origin = 0x338000, length = 0x007F80     /* on-chip FLASH */
    CSM_RSVD    : origin = 0x33FF80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
    BEGIN_FLASH : origin = 0x33FFF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
    CSM_PWL     : origin = 0x33FFF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */
    ADC_CAL     : origin = 0x380080, length = 0x000009	   /* Part of TI OTP */
    IQTABLES    : origin = 0x3FE000, length = 0x000b50     /* IQ Math Tables in Boot ROM */
    IQTABLES2   : origin = 0x3FEB50, length = 0x00008c     /* IQ Math Tables in Boot ROM */  
    FPUTABLES   : origin = 0x3FEBDC, length = 0x0006A0     /* FPU Tables in Boot ROM */
    ROM         : origin = 0x3FF27C, length = 0x000D44     /* Boot ROM */
   	RESET       : origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM  */
   	VECTORS     : origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM  */


PAGE 1 :   /* Data Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
           /* Registers remain on PAGE1                                                  */

   	RAMM0       : origin = 0x000000, length = 0x000400     /* on-chip RAM block M0 */
   	BOOT_RSVD   : origin = 0x000400, length = 0x000080     /* Part of M1, BOOT rom will use this for stack */
   	RAMM1       : origin = 0x000480, length = 0x000380     /* on-chip RAM block M1 */
	RAML4       : origin = 0x00C000, length = 0x001000     /* on-chip RAM block L4 */
    RAML5       : origin = 0x00D000, length = 0x001000     /* on-chip RAM block L5 */
    RAML6       : origin = 0x00E000, length = 0x001000     /* on-chip RAM block L6 */
    RAML7       : origin = 0x00F000, length = 0x001000     /* on-chip RAM block L7 */
    ZONE7B      : origin = 0x20FC00, length = 0x000400     /* XINTF zone 7 - data space */
}

/**************************************************************/
/* Link all user defined sections                             */
/**************************************************************/
SECTIONS
{

     DLOG: 			> RAML7,PAGE = 1
/*** Code Security Password Locations ***/
   	csmpasswds      : > CSM_PWL     	PAGE = 0
   	csm_rsvd        : > CSM_RSVD    	PAGE = 0

/*** User Defined Sections ***/
   	codestart       : > BEGIN_FLASH,	PAGE = 0        /* Used by file CodeStartBranch.asm */
   	wddisable		: > FLASHA,			PAGE = 0	
  	copysections	: > FLASHA,			PAGE = 0

	 /* Allocate IQ math areas: */
   IQmath           : > RAM_L0L1L2L3     		PAGE = 0        /* Math Code */
   IQmathTables     : > IQTABLES,  		PAGE = 0, TYPE = NOLOAD 
   IQmathTables2    : > IQTABLES2, 		PAGE = 0, TYPE = NOLOAD 
   FPUmathTables    : > FPUTABLES, 		PAGE = 0, TYPE = NOLOAD 
         
   /* Allocate DMA-accessible RAM sections: */
   DMARAML4         : > RAML4,     		PAGE = 1
   DMARAML5         : > RAML5,     		PAGE = 1
//   DMARAML6         : > RAML6,     		PAGE = 1
   DMARAML7         : > RAML7,     		PAGE = 1
   
   /* Allocate 0x400 of XINTF Zone 7 to storing data */
   ZONE7DATA        : > ZONE7B,    		PAGE = 1

/* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */
   .adc_cal     	: load = ADC_CAL,   PAGE = 0, TYPE = NOLOAD 

/* .reset is a standard section used by the compiler.  It contains the */ 
/* the address of the start of _c_int00 for C Code.   /*
/* When using the boot ROM this section and the CPU vector */
/* table is not needed.  Thus the default type is set here to  */
/* DSECT  */ 
	.reset         	: > RESET,      	PAGE = 0, TYPE = DSECT
	vectors         : > VECTORS     	PAGE = 0, TYPE = DSECT

/*** Uninitialized Sections ***/
   	.stack          : > RAMM0       	PAGE = 1
//   	.ebss           : > RAMM1    		PAGE = 1
   	.ebss           : > RAML6    		PAGE = 1
   	.esysmem        : > RAMM1       	PAGE = 1

/*** Initialized Sections ***/  
  	.cinit			:	LOAD = FLASHA,		PAGE = 0        /* can be ROM */ 
                		RUN = RAM_L0L1L2L3, PAGE = 0   		/* must be CSM secured RAM */
                		LOAD_START(_cinit_loadstart),
                		RUN_START(_cinit_runstart),
                		SIZE(_cinit_size)

	.const			:   LOAD = FLASHA,  	PAGE = 0        /* can be ROM */ 
                		RUN = RAM_L0L1L2L3,	PAGE = 0        /* must be CSM secured RAM */
                		LOAD_START(_const_loadstart),
                		RUN_START(_const_runstart),
                		SIZE(_const_size)

	.econst			:   LOAD = FLASHA,  	PAGE = 0        /* can be ROM */ 
                		RUN = RAM_L0L1L2L3, PAGE = 0        /* must be CSM secured RAM */
                		LOAD_START(_econst_loadstart),
               			RUN_START(_econst_runstart),
                		SIZE(_econst_size)

	.pinit			:   LOAD = FLASHA,  	PAGE = 0        /* can be ROM */ 
                		RUN = RAM_L0L1L2L3, PAGE = 0        /* must be CSM secured RAM */
                		LOAD_START(_pinit_loadstart),
                		RUN_START(_pinit_runstart),
                		SIZE(_pinit_size)

	.switch			:   LOAD = FLASHA,  	PAGE = 0        /* can be ROM */ 
                		RUN = RAM_L0L1L2L3, PAGE = 0        /* must be CSM secured RAM */
                		LOAD_START(_switch_loadstart),
                		RUN_START(_switch_runstart),
                		SIZE(_switch_size)

	.text			:   LOAD = FLASHA, 		PAGE = 0        /* can be ROM */ 
                		RUN = RAM_L0L1L2L3, PAGE = 0        /* must be CSM secured RAM */
                		LOAD_START(_text_loadstart),
                		RUN_START(_text_runstart),
                		SIZE(_text_size)


}

/******************* end of file ************************/

I am atatching my nonbios.cmd file.

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CCSv4 Compiling F28235 Code with .ebss and .bss in External RAM