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TMS320F28069: f28069M_ram_lnk.cmd and 28069_RAM_lnk.cmd

Part Number: TMS320F28069
Other Parts Discussed in Thread: MOTORWARE

Hi,

Looking at the 2 aforesaid  .cmd files:

MEMORY
{
PAGE 0 :

   BEGIN       : origin = 0x000000, length = 0x000002    /* BEGIN is used for the "boot to SARAM" bootloader mode   */
   RAMM0       : origin = 0x000050, length = 0x0003B0
   RAML0_L8    : origin = 0x008000, length = 0x00B800	 /* on-chip RAM block RAML0-L8. From 0x13800 to 0x14000 is reserved for InstaSPIN */

This one is used in Lab05d of Motorware

and

MEMORY
{
PAGE 0 :
   /* BEGIN is used for the "boot to SARAM" bootloader mode   */

   BEGIN       : origin = 0x000000, length = 0x000002
   RAMM0       : origin = 0x000050, length = 0x0003B0
   RAML0_L3    : origin = 0x008000, length = 0x002000	 /* RAML0-3 combined for size of .text */

This one is used with  Example_2806xMcBSP_DLB_DMA.

To do DMA transfers, I understand that the memory region has to be within the L5 - L8 DMA capable SARAM.

My question is to do DMA, does the memory region described which lies within L5-L8 has to be in PAGE 1 too ?

I ask this question because in the McBSP DMA example, the RAM L4-L8 is defined in PAGE1 while in the Motorware Lab05d it is defined in PAGE0.

What would happen if the memory region is in PAGE0 and I do DMA transfer instead of PAGE1 ?

Wondering why the difference. If someone could explain the situation, that would be much appreciated.

Thanks,

Manu