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TIDM-1000: Eval board starting questions

Part Number: TIDM-1000
Other Parts Discussed in Thread: C2000WARE, C2000WARE-DIGITALPOWER-SDK, POWERSUITE, SFRA

Hello everyone,

This thread follows my previous about tidm-1000 first launch. I have multiple questions :

1/ What is the link between the .c code and the "kit.xml" ? I have understood that the .cfg modify the .xml but I don't understand how the xml modify the code.

2/ In the .cfg sheet, we can choose between 4 builds. Does each build is independant or do we need to configure all of them for using build 4 ? I am asking this because I can't choose loop with the scrollbar menu :

If I want to configure voltage loop I have to choose build 3, idem for Gi and Gs with builds 2 and 4.

3/ Like the question 2, I can't change neither "Comp number" nor "Comp style", I don't know why. Moreover In build 2, with a P correcter I have also a Ti coeff in the compensator designer and in build 3 I have no choice to use PID (different from the documentation ...maybe it's another version) :

4/ In build 1 openloop, all phasis are bypassed (all dutycycles are the same) ... Is it not dangerous ?

5/  At page 41 of TIDUCJ0D, vBusRef is equal to 1.32 which is correspond to 600v/454v = VBUSREF_Voltage / VsenseMaxAC.

I think it's linked to PU values but why assume that VsenseMaxAC is equal to VbusSenseMax (454 and 717v in our case) ? I still can't understand why this isn't a problem to make that.

6/ It's not a question but maybe there is a small bug in the cfg page : the button "save" doesn't work.

I am asking all this because I have good results on AC current in build 3. I am using a 290ohm load instead of 500 ohm but before increase all gains I want to know what I am doing.

Thank you very much and have a nice day,

Best regards,

Jérémy

  • 1/ What is the link between the .c code and the "kit.xml" ? I have understood that the .cfg modify the .xml but I don't understand how the xml modify the code.

    Jeremy, The CFG file is the GUI through which you can change the options, XML file is a format that it writes to with the information of the changes to work with the compensation designer, it is not directly used to generate code. The CFG file can write to the settings.h file alone. No other file can be written to by the CFG file. The exact way it writes that .h file, to be honest, is not relevant to the user, as TI does not expose those APIs for the end user they are exclusively for TI to provide some basic GUis, and to be honest the API and software structure is fairly involved with Java script etc. and is not very friendly for us to create something either. It does use GUI composer for the graphical items you see on the CFG page, which is another tool from TI.

    2/ In the .cfg sheet, we can choose between 4 builds. Does each build is independant or do we need to configure all of them for using build 4 ? I am asking this because I can't choose loop with the scrollbar menu :

    If I want to configure voltage loop I have to choose build 3, idem for Gi and Gs with builds 2 and 4.

    Jeremy, yes that is correct, we want the user to incrementally build the system and hence only allow changing one loop at a time which is determined by the build level. At least for the vienna rectifier solution, this is the safest method. For some other solutions, we do allow tuning more than one compensator at a time. 

    3/ Like the question 2, I can't change neither "Comp number" nor "Comp style", I don't know why. Moreover In build 2, with a P correcter I have also a Ti coeff in the compensator designer and in build 3 I have no choice to use PID (different from the documentation ...maybe it's another version) :

    Jeremy, does not look like you are on the latest version of this software. Please note we recently updated this solution in C2000Ware DigitalPower SDK, please use that solution to base the question as that is the maintained branch of the solution. Yes, we do restrict the no and style based on the type of solution it is. 

    4/ In build 1 openloop, all phasis are bypassed (all dutycycles are the same) ... Is it not dangerous ?

    There is an inductor hence I do not think it is dangerous, it is like operating and interleaved boost but all the boost are driven with the same PWM. I have not seen any issue with it. 

    5/  At page 41 of TIDUCJ0D, vBusRef is equal to 1.32 which is correspond to 600v/454v = VBUSREF_Voltage / VsenseMaxAC.

    I think it's linked to PU values but why assume that VsenseMaxAC is equal to VbusSenseMax (454 and 717v in our case) ? I still can't understand why this isn't a problem to make that.

    Because of PU control, it is best to bring it relative to one value, otherwise, you will get additional gain terms in the plant model and it can become more complicated. For example on TIDA-1007 we do allow the user to have two different gain scales for the Vbus and Vac but then we do scale them internally with the Vbus scale to make sure all the scales are matching when we compute the duty cycle. 

        dutyPU=( gi_out+(ac_vol_sensed*
                            (float)VAC_MAX_SENSE/(float)VDCBUS_MAX_SENSE)
                           -inductor_voltage_drop_feedforward )/
                     (vBus_sensed);
    

    I don;t see that we have added that in the TIDM-1000 , however you can look at that example and see how you can adapt your closed loop for a different scaling. 

    6/ It's not a question but maybe there is a small bug in the cfg page : the button "save" doesn't work.

    please use the latest version in C2000Ware-DigitalPower-SDK, v 1.02.00.00 , the save is for saving the settings.h file which i verified it is doing. It is not for the CFG file. 

    I am asking all this because I have good results on AC current in build 3. I am using a 290ohm load instead of 500 ohm but before increase all gains I want to know what I am doing.

    Thank you very much and have a nice day,

    Best regards,

    Jérémy

  • Thank you Manish,

    Indeed I had some troubles with CCS configuration : My project was used the bad version of powersuite.

    For the modelisation I will admit it and restart from scratch.

    I can now have the same things between compensation designer and TIDUCJ0D doc. However I have problem with the build 3.

    This SFRA result for build 2 with my system :

    I think this is not bad, this the modelled system for the build 3 :

    It's exactly the same than documentation.

    Changed parameters are output Cap Co = 220µF (on the board), outputVbus = 450 V (for beginning) and operating power = 698W in accordance with my 290ohm load.

    When I am clearing PWMtrip, I can heard the power increasing very fast then an trop occur (probably in current). Can you give me advice or way to study please ?

  • The trip occurs on build level 3? with the voltage loop ?

    Do you still have the neutral connected?
  • Hi Manish,

    Sorry for my delayed answer I had moved in a new office ...

    Yes it's in build 3 and yes the neutrazl still connected.

    I have very lowered PID gains and it's working BUT output voltage is unstable with undervoltage bumps at random time (my phone doesn't work but I will be able to give you picture). It's working almost good during one or two minutes and it sudently crash with big "grrrrrrrr" so I am pressind emergency stop...

    Do you have an idea ?

    Do you have ever worked with SVPWM model ? do you think it could increase the robustness of the pfc ?
  • Jeremy,

    We do use third harmonic injection in the build level 4, it definitely helps.

    However I will not recommend running it with neutral connected from the mid of the DC bus.

    To be honest, I will recommend first simulating with all your gains etc, to verify if it's stable in simulation? Have you tried that?

    Also for the current loop, you only have propotional gain ???

    Also, i would check offsets in the current sensor, is this new hardware? do you run calibrartion routine? I have seen those offsets if they are too mych to slowly add up and make the bus unstable. If you have PI loop it adds up much faster.

    Regards
    Manish Bhardwaj
  • Hi Manish,

    For the moment I haven't started the build4, so I still have the neutral point connected. My new office is not finished yet so I haven't the power for make tests.

    The problem with our simulation is that modelled components are not the same than the eval board so gains are not the same between simulation, our prototype and TI eval board. But yes, it's stable in simulation.

    For the current I have only P gain, I don't know about "new hardware", I will check that and no, I haven't run the calibration routine.

    I will try with a PI for current loop but I don't mastering this points for the moment.

    Thank you very much and have a nice day,
    Best regards,
    Jérémy
  • Jeremy,

    Ok, in my experience using PI for the inner current loop will exacerbate the offset issue,

    I understand simulation is not accounting for all effects, but atleast knowing that simulation is stable helps elimiate some basic issues.

    I will recommend checking offsets on the new hardware and running them through calibrartion, the way i typically do this is by subjecting to a known current etc and checking the ADC read values on the controller. Then comparing in excel file. There may be better methods but I am un-aware of them.

    Also, I believe I answered your orginal questions and have offered you my advise on the subsequent one. I understand it may take you some time to follow up and do tests. In the meanwhile I will need to close this thread, please open a related question when you have additional follow up questions.
  • Ok, I will do that.

    Thank you again Manish and have a nice day !!

    Jérémy