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CCS/TMS320F28379D: EnDat Dual Master Implementation using LaunchPad & TIDM-1008

Part Number: TMS320F28379D
Other Parts Discussed in Thread: TIDM-1008, BOOSTXL-POSMGR, LAUNCHXL-F28379D, CONTROLSUITE,

Tool/software: Code Composer Studio

Hello everyone.

I recently did EnDat related works using a LaunchPad and a TIDM-1008 board.

Using these HWs, the EnDat related work was done successfully using an HIDENHAIN absolute encoder.

At TIDM-1008 document,Table 2. TIDM-1008 Board and BOOSTXL-POSMGR Connectors show the following things.




 Abs-Enc-1 (J7)

 EnDat 2.1, EnDat 2.2, other absolute encoders


 Abs-Enc-2 (J8)

 EnDat 2.1, EnDat 2.2, other absolute encoders


Even though TIDM-1008 board has 2ea absolute encoder connector to support EnDat interface, only J7 connector is available in this time.

However, I need dual Endat interface to do specific purpose.

To do this work, I thought that if 2ea TIDM-1008 boards are used, 2ea EnDat interface is possible since LAUNCHXL-F28379D hardware has mirror image connectors as follows. .


LAUNCHXL-F28379D Connector


Site 1 (J1 J3 + J4 J2)

x1 EnDat 2.1/2.2 or other Absolute Encoder and PTO

Site 2 (J5 J7 + J8 J6)

x1 EnDat 2.1/2.2 or other Absolute Encoder and PTO

To verify my idea, I attached a TIDM-1008 board to Site 1, and modified source code as follows.

(See F28379D LaunchPad Pin Out and Pin Mux Options at ”sprui77b Page 8~9” )



Site 1 (J1 J3 + J4 J2)

Site 2 (J5 J7 + J8 J6)

(Original Code)


CLB Related










SPI Related

















But its results is NG. (at endat.c)

                  //Ensure that EncData is now low

                  if (GpioDataRegs.GPBDAT.bit.GPIO58 == 1) { //63(original) => 58(modified)





1) Is there any solutions or tips to solve this issue?

2) Why EPWM1~4 is defined at EnDat_Init( ) at endat.c for the following F28379D LaunchPad Pin Out and Pin Mux Options as follows.

   Site 2 (J5 J7 + J8 J6) Case: Original Source

    If the below table mapping is correct, EPWM7~8 should be defined.

   But this odd mapping case, EnDat interface is OK.

 CpuSysRegs.PCLKCR2.bit.EPWM1 = 1;
 CpuSysRegs.PCLKCR2.bit.EPWM2 = 1;
 CpuSysRegs.PCLKCR2.bit.EPWM3 = 1;
 CpuSysRegs.PCLKCR2.bit.EPWM4 = 1;


  • Hello,

    Concerned experts have been notified of this query.

    Note that it is Thanksgiving week in US and most of the TI engineers are away.

    Please expect a delayed response, surely by early next week.





    If a post answers your question, please mark it with the "verify answer" button.

    Other useful links:

    C2000 Getting Started      C2000 Flash Common Issues/FAQs      Emulation FAQ

  • Hi,

    The hardware is designed for dual encoder interface for future purposes. Currently, the PositionManager EnDat solution supports only one encoder.
    You've to use it the way it's supported in the software library here C:\ti\controlSUITE\development_kits\BOOSTXL_POSMGR\v01_01_00_00\endat22-F28379DLpad-S2. Dual encoder support is not available.
  • Dear Subrahmanya

    Most of all, thanks for your comments.
    As your comment, the PositionManager EnDat solution supports only one encoder in now.
    Yes! Your comment is right!
    But my situation is littel different.
    To check dual EnDat HW feasibility, Site 1 (J1 J3 + J4 J2) and Site 2 (J5 J7 + J8 J6) were respectively checked.
    Original SW code case, EnDat interface using Site 2 (J5 J7 + J8 J6) has no problem.
    Since a TIDM-1008 board has mirror image: Site 1 & Site 2, EnDat interface realization using Site 1 (J1 J3 + J4 J2) should be no problem if its pin mapping related works are propely done.
    In other word, 1ea EnDat interface feasibility check using Site 1 (J1 J3 + J4 J2) is current issue.
    => 1ea EnDat interface feasibility check using Site 2 (J5 J7 + J8 J6) is no problem. (Original SW)

    Thnaks again for your kind comments.
  • Hi Jin,
    Though it seems like a mirror image in terms of pins, still the software is meant to operate at a given site (in this case Site-2) only.
    The underlying library uses a module called CLB (Configurable logic block) as described in the documentation.
    This module and it's APIs are provided in a pre-configured fashion to operate with designated pins only.
    Also, as described in the documentation, these pins are not configurable - hence i've suggested earlier that the option you mentioned above is not feasible. I hope this answers your query.
    Thank you.
  • Dear Subrahmanya,

    Really thanks for your comments.
    From your comments, i understood current situation clearly .

    sprui35.pdf (C2000™ Position Manager EnDat22 Library Module)
    At page 6. "Note that the CLB module can only be accessed via library functions provided in the PM EnDat22 Library and not otherwise configurable by users."
    On other word, current EnDat22 Library support Site 2 (J5 J7 + J8 J6) only even though Site 1 & Site 2 has mirror image.

    Is there any chance to support dual EnDat interface or additional technical support (ex. EnDat22 Library update to support Site 1)?
    Due to the specific operation, 2ea Endat interface should be realized.
    Can i get the TI future plan to adopt 2ea simultaneous EnDat interface using a new HW and a new EnDat Library?
    Thnak you for your kind answer.
  • Hi Jin,
    Good to know that I could clarify your question. Regarding support for Dual interface, currently there is no plan to support it.
    As for the future plan, we are currently working on a tool that helps customers configure CLB on their own and it will also enable customers to configure or change the configuration as needed by their application. Once such tool is available customers can create their own configuration and need not wait for TI to provide the same. Timelines for the release of this tool has not been set as of now. Thank you.
  • Dear Subrahmanya,

    From your detail comments, i can understand current EnDat related TI plan.
    Unfortunately, EnDat dual interface realization is very important to me.
    As you know, CLB block is adopted 28379 only.
    If the above CLB realted tool requires long time to release, other solution without CLB can be a good approach.
    In other word, there are two methods to realize dual EnDat interface.

    Case 1. Dual EnDat interface using a tool that helps customers configure CLB on their own
    => This case, IT supports are indispensable.
    But, timelines for the release of this tool has not been set as of now (as your comment.)

    Case 2. Dual EnDat interface whthout CLB
    => From TI some documents. i find that EnDat interface using 28377 (without CLB) is possible.
    But, I did not get enoungh information to do EnDat interface using 28377.

    Can I get the IT supports or some tips to do my work?
    Thank you very much , I appreciate your kind help again.
  • Hi Jin,
    Thanks for your interest and understanding.
    EnDat interface without using CLB is not possible.
    The library released in applicable for F28379D only not F28377.

  • I presume this issue is resolved as the implementation is not feasible on F28377 as mentioned above.
    Please close this thread or let me know if you've any additional questions/comments.
  • I am also in need to built two Endat interfaces connected to one TMS320F28379D.

    Is there now a timline for the release of the tool that helps customers configure the CLB on their own?

    Will there be a restriction in the tool which EPWM modul, SPI- Modul, GPIO, INPUTXBAR or OUTPUTXBAR  you can choose to use the TI Libary for ENDat?

    I need to built the Hardware now. It would be nice to make a software Update to get two ENDat interfaces,  when the Tool in available.

    Best regards

    Jan Hummel

  • Hi,

    Current plan for CLB configuration tools to be available for customer use will be in 4th quarter of 2019.
    There will be some limitation due to the CLB architecture itself.
    As I mentioned earlier, we've not evaluated or implemented 2 EnDat interfaces and hence it would be wise in evaluate the implementation once the configuration tools are available and then make hardware decisions. There is limited amount of logic in CLB, hence it's better to implement the interface first before designing hardware.