Other Parts Discussed in Thread: AMC1303E2510
I'm using Filters 2 and 3 of the TMS320F28075 SDFM to read the Manchester Encoded output from 2 separate AMC1303E2510 chips. The AMC1303E2510 has it's own internally generated 10MHz CLK, therefore I'm using CMPC and CMPD of ePWM12 to synchronise filters 2 and 3 of SDFM2.
In section 12.1.2 of the document "Texas TMS320F2807x Tech Ref spruhm9b" it states "The FILRES input does not reset the data registers in the Filter Unit". However during testing I've found that ePWM12.CMPC and CMPD set the SDDATA registers to 0.
In my code I have an interrupt to read the SDFM SDDATA registers.
- At the beginning of the interrupt the SDFM data registers are read, they are some non-zero value.
- Then the interrupt waits until the ePWM counter has passed CMPC and CMPD.
- Then it reads the SDFM SDDATA registers again, now they have been set to 0.
So I'm just wondering if you can confirm what the behaviour of the SDDATA register is when ePWM12.CMPC and CMPD are used to reset the filters. Does SDDATA get reset to 0?