Part Number: LAUNCHXL-F28379D
Other Parts Discussed in Thread: C2000WARE
Hi evryone!
I try meet FT232H with 28379D by EMIF. If working directly and swithch ports by software manually it works well, but ugly solutions...
28379D Control card on the way, so play with LAUNCH-XL 28379D with limited acsess to the CPU pins.
I try use EMIF from C2000Ware sample and meet problem with it. If run this code on the CS, WE, OE pins has activity on each CS low state 4 WE or 4 OE low states (so looks like 32bit variable sent as 4x8bit), A0 (hope i connect probe to A0 also doesn`t change)
But actual data bus tired to hight state only, readback from EMIF show 0x0. I expect saw same binary noice by oscilloscope and readback 0xff.
Right now FT232H connected to the GPIO as first attempt working by software, try to test EMIF on the empty connector.
Second question, on the J9 EMIF pin description in the LAUNCHPAD F28379D. Pin2 and Pin3 has legend A0 and A1 which connected to GPIO92 and GPIO93, but it by Pimux tool BA lines. Where is true?
How correctly understand address bus? I can use any single adress line, but how calculate correct address in the programm, for example base address 0x100000, try to use A7,GPIO45, pin9 on J9 connector. Where on the CPU description GPIO45/EM1A5.
//
// Included Files
//
#include "F28x_Project.h"
#define TEST_PASS 0xABCDABCD
#define TEST_FAIL 0xDEADDEAD
#define ASRAM_CS2_START_ADDR 0x100000
#define ASRAM_CS2_SIZE 0x1
#define EMIF1 0
#define EMIF2 1
//#define MEM_D_WIDTH 1 // 16Bit Memory Interface
#define TURN_AROUND_TIME 0 // Turn Around time of 2 Emif Clock
#define RD_SETUP_TIME 0 // Read Setup time of 1 Emif Clock
#define RD_STROBE_TIME 3 // Read Strobe time of 4 Emif Clock
#define RD_HOLD_TIME 0 // Read Hold time of 1 Emif Clock
#define WR_SETUP_TIME 0 // Write Hold time of 1 Emif Clock
#define WR_STROBE_TIME 0 // Write Setup time of 1 Emif Clock
#define WR_HOLD_TIME 0 // Write Hold time of 1 Emif Clock
#define EXTEND_WAIT 0 // Disable Extended Wait
#define STROBE_SEL 0 // Disable Strobe Mode.
#define WAIT_POLAR_INV 0
#define WAIT_COUNT 0
//
// Globals
//
Uint16 ErrCount = 0;
Uint32 TEST_STATUS;
int i;
//
// Function Prototypes
//
void setup_emif1_pinmux_async_8bit(void);
//
// mem_read_write - This function performs simple read/write word accesses
// to memory.
//
char mem_read_write(Uint32 start_addr, Uint32 mem_size)
{
unsigned long mem_rds;
unsigned long mem_wds;
long *XMEM_ps;
unsigned int i;
//
//Write data
//
XMEM_ps = (long *)start_addr;
//
//Fill memory
//
mem_wds = 0x01234567;
for (;;)
{
*XMEM_ps = mem_wds;
mem_rds = *XMEM_ps+1;
mem_wds += 0x11111111;
}
}
//
// Main
//
void main(void)
{
// char ErrCount_local;
// TEST_STATUS = TEST_FAIL;
//
// Initialize system control
//
InitSysCtrl();
DINT;
//
// Initialize the PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the F2837xD_PieCtrl.c file.
//
InitPieCtrl();
//
// Disable CPU interrupts and clear all CPU interrupt flags:
//
EALLOW;
IER = 0x0000;
IFR = 0x0000;
EDIS;
//
// Initialize the PIE vector table with pointers to the shell Interrupt
// GService Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in F2837xD_DefaultIsr.c.
// This function is found in F2837xD_PieVect.c.
//
InitPieVectTable();
//
//Configure to run EMIF1 on full Rate (EMIF1CLK = CPU1SYSCLK)
//
EALLOW;
ClkCfgRegs.PERCLKDIVSEL.bit.EMIF1CLKDIV = 0x0;
EDIS;
EALLOW;
//
// Grab EMIF1 For CPU1
//
Emif1ConfigRegs.EMIF1MSEL.all = 0x93A5CE71;
if(Emif1ConfigRegs.EMIF1MSEL.all != 0x1)
{
ErrCount++;
}
//
//Disable Access Protection (CPU_FETCH/CPU_WR/DMA_WR)
//
Emif1ConfigRegs.EMIF1ACCPROT0.all = 0x0;
if(Emif1ConfigRegs.EMIF1ACCPROT0.all != 0x0)
{
ErrCount++;
}
//
// Commit the configuration related to protection. Till this bit remains set
// content of EMIF1ACCPROT0 register can't be changed.
//
Emif1ConfigRegs.EMIF1COMMIT.all = 0x1;
if(Emif1ConfigRegs.EMIF1COMMIT.all != 0x1)
{
ErrCount++;
}
//
// Lock the configuration so that EMIF1COMMIT register can't be
// changed any more.
//
Emif1ConfigRegs.EMIF1LOCK.all = 0x1;
if(Emif1ConfigRegs.EMIF1LOCK.all != 1)
{
ErrCount++;
}
EDIS;
//
//Configure GPIO pins for EMIF1
//
setup_emif1_pinmux_async_8bit();
//
//Configure the access timing for CS2 space
//
Emif1Regs.ASYNC_CS2_CR.all = (EMIF_ASYNC_ASIZE_8 | // 16Bit Memory
// Interface
EMIF_ASYNC_TA_1 | // Turn Around time
// of 2 Emif Clock
EMIF_ASYNC_RHOLD_1 | // Read Hold time
// of 1 Emif Clock
EMIF_ASYNC_RSTROBE_4 | // Read Strobe time
// of 4 Emif Clock
EMIF_ASYNC_RSETUP_1 | // Read Setup time
// of 1 Emif Clock
EMIF_ASYNC_WHOLD_1 | // Write Hold time
// of 1 Emif Clock
EMIF_ASYNC_WSTROBE_1 | // Write Strobe time
// of 1 Emif Clock
EMIF_ASYNC_WSETUP_1 | // Write Setup time
// of 1 Emif Clock
EMIF_ASYNC_EW_DISABLE | // Extended Wait
// Disable.
EMIF_ASYNC_SS_DISABLE // Strobe Select Mode
// Disable.
);
//
//Check basic RD/WR access to CS2 space
//
mem_read_write(ASRAM_CS2_START_ADDR, ASRAM_CS2_SIZE);
}
void setup_emif1_pinmux_async_8bit()
{
Uint16 i;
GPIO_SetupPinMux(31,0,2); // WE low when write active
GPIO_SetupPinMux(34,0,2); // CS2 low when operation active
GPIO_SetupPinMux(37,0,2); // OE low when read active
GPIO_SetupPinMux(38,0,2); // A0 address
//
//setup async mode and enable pull-ups for Data pins
//
for (i=77; i<=85; i++)
{
if (i != 84)
{
GPIO_SetupPinOptions(i,0,0x31); // GPIO_ASYNC||GPIO_PULLUP
}
}
}
