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TMS320F28022: Conditions for SHDWAFULL bit Set to 1 in CMPCTL

Part Number: TMS320F28022

Hi Team,

   My customer used F28022 as primary PFC controller, and used shadow mode for CMPA register update,  and during their products' test,  while the bit SHDWAFULL is set to 1, their system THDI is very bad.

   Could you kindly give comments on below items:

    1) Conditions on SHDWAFULL bit is set to 1?  which means the CMPA shadow FIFO is full?

    2) Comments on how to eliminate the condition that SHDWAFULL set to 1?

Expect for your reply, thanks.

Best Regards


  • Benjamin,

    1. SHDWAFULL is set when a 32-bit write to CMPA:CMPAHR register or a 16-bit write to CMPA register is made. A 16-bit write to CMPAHR register will not affect the flag. This bit self clears once a load-strobe occurs.... Yes this means that a value has been written to the shadow register, but no load-strobe pulse has occurred.
    2. Only update the Shadow registers once before each load strobe. Alternatively you could read the SHDWxFULL bit before writing to the registers. If you have a more up-to-date value that you would like to write to the shadow register I think you will be forced to trip this flag.


  • Cody,
    Thanks for your clarification and suggestion.

    Best Regards