In example C:\ti\c2000\C2000Ware_1_00_06_00\device_support\f2806x\examples\c28\external_interrupt
There is a part where they "connect XINT1 and XINT2 to Group 1 with interrupt 4 and 5". As there are 96 interrupts sources available I understand that these should be MUXed to the 12 available cpu interrupts.
And each cpu interrupt is a "Group" of eight interrupts. But how are XINT1 and XINT2 connected to Group 1 INT4 and INT5(they are just enabled)? And why are the XINT1 and XINT PieVectTables directly connected to the interrupt functions?
I cannot completely follow the story with the corresponding code? Some code seems to be missing in the example to really make it sense?Thank you in advance.
EALLOW; // This is needed to write to EALLOW protected registers PieVectTable.XINT1 = &xint1_isr; PieVectTable.XINT2 = &xint2_isr; EDIS; // This is needed to disable write to EALLOW protected registers
// // Enable XINT1 and XINT2 in the PIE: Group 1 interrupt 4 & 5 // Enable INT1 which is connected to WAKEINT // PieCtrlRegs.PIECTRL.bit.ENPIE = 1; // Enable the PIE block PieCtrlRegs.PIEIER1.bit.INTx4 = 1; // Enable PIE Group 1 INT4 PieCtrlRegs.PIEIER1.bit.INTx5 = 1; // Enable PIE Group 1 INT5 IER |= M_INT1; // Enable CPU INT1 EINT;