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CCS/TMS320F28335: Facing problem while sampling ADC channel at 1 mbps

Namita Pawar
Intellectual 680 points
Part Number: TMS320F28335


Tool/software: Code Composer Studio

Hi,

I am using eZdsp TMS320F28335 board for testing ADC channel.

Test conditions are :

  1. input = 2.4 V p-p sine wave @ 50 KHz
  2. Sampling rate 1 mbps

When I tried sampling channel at 1 mbps using PWM as source of trigger for SOC, the sine wave read in debug mode not coming as sine instead  it is coming as triangular wave.

Is there any other way with which we can configure the sampling frequency other that PWM time base register. What is the maximum sampling frequency that we can configure?

I am not getting exactly why the ADC is not reading sine wave properly at the rate of 1mbps.

Please help with the issue.

Thanks,

Namita

  • 0
    TI__Guru 62975 points

    Namita,

    The EPWM is the easiest trigger source for periodic ADC conversions.  You can find the other sources documented in the ADC User Guide.

    According to the datasheet, the fastest supported rate is 12.5 MSPS.

    It may be useful to add a GPIO toggle inside the ADC ISR so that you can verify the sampling rate.  For additional insight, you can also configure the EPWM to toggle its pin when the ADC SOCx trigger is generated using the AQCTLx registers.

    -Tommy

  • 0 in reply to tlee
    TI__Guru 62975 points

    Namita,

    It has been a while since your last update.  I assume that you were able to resolve your issue.

    If not, please reply to this thread.  If the thread has locked due to timeout, please create a new thread describing the current status of your issue.

    -Tommy

  • 0 in reply to tlee
    Intellectual 680 points

    Hi Tommy,

    Still I need help with the issue.

    The input sine wave that I am sampling is at frequency 100 KHz and the sampling rate I want is 1mbps.

    As you said with ePWM we can configure sampling rate. The configuration setting I have done are as shown below. I am not sure how we setup value for EPwm1Regs.TBPRD  register  for 1 mbps sampling rate. Is there any calculation for setting up EPwm1Regs.TBPRD register.

    // Assumes ePWM1 clock is already enabled in InitSysCtrl();

    //

    EPwm1Regs.ETSEL.bit.SOCAEN = 1; // Enable SOC on A group

    EPwm1Regs.ETSEL.bit.SOCASEL = 4; // Select SOC from from CPMA on upcount

    EPwm1Regs.ETPS.bit.SOCAPRD = 1; // Generate pulse on 1st event

    　

    　

    EPwm1Regs.AQCTLA.bit.ZRO = 2; // force EPWM1A o/p high

    EPwm1Regs.AQCTLA.bit.CAU = 1; // force EPWM1A o/p low.

    EPwm1Regs.CMPA.half.CMPA = 10;

    　

    EPwm1Regs.TBPRD =150;

    EPwm1Regs.TBCTL.bit.CTRMODE = 0; // count up and start

    AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1;

     

     

     

     

    Thanks,

    Namita

  • 0 in reply to Namita Pawar
    TI__Guru 62975 points

    Namita,

    The functional behavior of the EPWM is described in the EPWM Reference Guide.  Please take a look at the guide and let us know if you require additional clarification.

    The shortest explanation is that the EPWM is a continuous counter with many features, where the TBPRD value typically determines when the counter resets to zero.  The ADC is triggered once per count sequence so TBPRD determines the effective sampling rate.

    You can also reference this introductory F2833x Workshop that includes information on EPWM-ADC behavior and hands-on examples.

    -Tommy

  • 0 in reply to tlee
    Intellectual 680 points

    Thank you Tommy.

    The issue has been resolved with proper setting of TBPRD.

    Thanks,

    Namita