Hi.
I have a little doubt about CLB configuration.
I refer to “TMS320F2837xD Dual-Core Microcontrollers – Technical Reference Manual” (file spruhm8i.pdf).
In figure 26-9 (page 2793 of the manual, see annex at the end of this document), it looks like that the inputs
of the “Output LUT” of the “FSM Block” are “EXT_IN0”, “EXT_IN1”, “S0” and “S1”.
But in figure 26-10 (page 2794 of the manual, see annex at the end of this document), it looks like that the
inputs of the “FSM LUT Block” are “EXT_IN0”, “EXT_IN1”, “EXTRA_EXT_IN0” and “EXTRA_EXT_IN 1”.
Even in the source file of the “PTO_Pulsegen” project it looks like that the inputs of the “FSM_0 Block” are
“EXT_IN0” (called “e0”), “EXT_IN1” (“e1”), “EXTRA_EXT_IN0” (“xe0”) and “EXTRA_EXT_IN 1” (“xe1”) (see the
annex screenshot).
So, what are the real inputs of the “FSM LUT Block”?
I think that they are “EXT_IN0”, “EXT_IN1”, “EXTRA_EXT_IN0” and “EXTRA_EXT_IN 1”, but I would like to be
sure.
Why in figure 26-9 the inputs of the “Output LUT” of the “FSM Block” are “EXT_IN0”, “EXT_IN1”, “S0” and
“S1”?
Many Thanks,
Antonio
