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CCS/F28M35M52C: Generate BIN file for ARM (M3) processor

Part Number: F28M35M52C
Other Parts Discussed in Thread: UNIFLASH,

Tool/software: Code Composer Studio

Hi,

I am using the following post-build command to generate the BIN file from the OUT file. This command works, but the resulting BIN file produces a verification error when using it with UniFlash:

    "${CCE_INSTALL_ROOT}/utils/tiobj2bin/tiobj2bin" "${BuildArtifactFileName}" "${BuildArtifactFileBaseName}.bin" "${CG_TOOL_ROOT}/bin/armofd.exe" "${CG_TOOL_ROOT}/bin/armhex.exe" "${CCE_INSTALL_ROOT}/utils/tiobj2bin/mkhex4bin.exe"

UniFlash reports:

    File: C:/.....bin: a data verification error occurred, file load failed.

The OUT works just fine, though. So does the BIN file for the C28 processor (using a different post build command, of course).

  • Tilfried,

    To clarify, are you seeing the verification error when you try to load the generated .bin file (clicking the "Load Image" button) or did you load the .out file, and then try to verify using the .bin file (clicking the "Verify Image" button).

    Thanks,

    Ricky

  • Hi Ricky,

    I used the UniFlash tool to "point" to the .bin file and pressed VERIFY. It fails, I pressed the LOAD IMAGE button and it fails, too.

    Doing the same for the C28 generated .bin file works just fine.

    regards, Tilli

  • Tilli,

    What error are you getting when loading image?

    Can you enable 'Verbose' in the console and provide the output?

    Thanks,

    Ricky

  • Hi Ricky, the error message is

    Could not determine target type of file. Actually the C28 bin file also exhibits the same issue.

    regards, Tilli

  • Tilli,

    There should not be a need to determine target type if loading the binary file format.

    Just to be sure, is the "binary" checkbox checked and starting address filled in when you load the .bin file? The "binary" checkbox should automatically be checked when you pick a .bin file, but you will still need to enter a start address, as binary files do not contain that information.

    Thanks,

    Ricky

  • Ricky, thanks for that information. So for the C28.bin file the start address seems to be 0x0 (as I can apply the BIN file using that address), but what's the address for the M3? How can I determine the correct start address (sorry, totally new to this)? regards, Tilli

  • Tilli,

    On F28M35M52C, flash memory is at address 0x200000 on the M3 core, and 0x100000 on the C28 core, so you can load it to those memory locations if you want it in flash. You can also check your linker file (.cmd) to see what memory sections you are using in your .out file.

    I supposed another question is why you are converting the .out file to binary format in the first place? This might help us figure out what additional recommendations we can provide for you.

    Thanks,

    Ricky

  • Thank you for the heads-up! Well, I thought handing out a BIN file to customers is better than the OUT file. Or is this an incorrect assumption? I don't want to expose or make it easy to reverse engineer information in the firmware. thanks, Tilli

  • Tilli,

    I'm not aware of the use case of using binary file as a way to protect information, although I'm not an expert in this area.

    The format does contain less information as compare to a .out file, as it does not contain symbol information, and therefore no way to debug the application (when loaded using CCS for example); and no address information, so you need to specify the start address. But otherwise, it should contain the same raw data.

    Thanks,

    Ricky

  • I have checked my .cmd files and am wondering how CCS identifies where to put the program im FLASH memory. The .cmd file for the M3 looks like this:

    MEMORY
    {    
        RESETISR (RX)    : origin = 0x00200030, length = 0x0008   /* Reset ISR is mapped to boot to Flash location */
        INTVECS (RX)     : origin = 0x00201000, length = 0x01B0
        FLASHLOAD (RX)   : origin = 0x00201200, length = 0x2E00   /* For storing code in Flash to copy to RAM at runtime */
        FLASH (RX)       : origin = 0x00204000, length = 0x7BFD0   
         C0 (RWX)         : origin = 0x20000000, length = 0x2000
        C1 (RWX)         : origin = 0x20002000, length = 0x2000
        BOOT_RSVD (RX)   : origin = 0x20004000, length = 0x0FF8
        C2 (RWX)         : origin = 0x200051B0, length = 0x0E50
        C3 (RWX)         : origin = 0x20006000, length = 0x2000
        S0 (RWX)         : origin = 0x20008000, length = 0xA000    /* Making S0 extra large to fit .bss */
        S5 (RWX)         : origin = 0x20012000, length = 0x2000
        S6 (RWX)         : origin = 0x20014000, length = 0x2000
        S7 (RWX)         : origin = 0x20016000, length = 0x2000
        CTOMRAM (RX)     : origin = 0x2007F000, length = 0x0800
        MTOCRAM (RWX)    : origin = 0x2007F800, length = 0x0800
    }

    and for the C28 like this:

    MEMORY
    {
    PAGE 0:    /* Program Memory */
               /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */
       RAML0_L1    : origin = 0x008000, length = 0x002000     /* on-chip RAM block L0 */
       /*RAML1       : origin = 0x009000, length = 0x001000*/     /* on-chip RAM block L1 */
       
       FLASHG      : origin = 0x120000, length = 0x008000     /* on-chip FLASH */
       FLASHF      : origin = 0x128000, length = 0x008000     /* on-chip FLASH */
       FLASHE       : origin = 0x130000, length = 0x008000      /* on-chip FLASH */
       FLASHD      : origin = 0x138000, length = 0x002000      /* on-chip FLASH */
       FLASHC      : origin = 0x13A000, length = 0x002000      /* on-chip FLASH */
       FLASHA      : origin = 0x13E000, length = 0x001F80      /* on-chip FLASH */
       
       CSM_RSVD    : origin = 0x13FF80, length = 0x000070     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
       BEGIN       : origin = 0x13FFF0, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
       FLASH_EXE_ONLY_P0  : origin = 0x13FFF2, length = 0x000002  /* Part of FLASHA.  Flash execute only locations in FLASHA */
       ECSL_PWL_P0 : origin = 0x13FFF4, length = 0x000004     /* Part of FLASHA.  ECSL password locations in FLASHA */
       CSM_PWL_P0  : origin = 0x13FFF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */

       FPUTABLES   : origin = 0x3FD258, length = 0x0006A0      /* FPU Tables in Boot ROM */
       IQTABLES    : origin = 0x3FD8F8, length = 0x000B50     /* IQ Math Tables in Boot ROM */
       IQTABLES2   : origin = 0x3FE448, length = 0x00008C     /* IQ Math Tables in Boot ROM */
       IQTABLES3   : origin = 0x3FE4D4, length = 0x0000AA      /* IQ Math Tables in Boot ROM */

       BOOTROM     : origin = 0x3FEDA8, length = 0x001200     /* Boot ROM */
       PIEMISHNDLR : origin = 0x3FFFBE, length = 0x000002      /* part of boot ROM  */
       RESET       : origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM  */
       VECTORS     : origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM  */

    PAGE 1 :   /* Data Memory */
               /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
               /* Registers remain on PAGE1                                                  */
       BOOT_RSVD   : origin = 0x000000, length = 0x000050     /* Part of M0, BOOT rom will use this for stack */
       RAMM0       : origin = 0x000050, length = 0x0003B0     /* on-chip RAM block M0 */
       RAMM1       : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
       RAML2       : origin = 0x00A000, length = 0x001000     /* on-chip RAM block L2 */
       RAML3       : origin = 0x00B000, length = 0x001000     /* on-chip RAM block L3 */
       RAMS0       : origin = 0x00C000, length = 0x001000     /* on-chip Shared RAM block S0 */
       RAMS1       : origin = 0x00D000, length = 0x001000     /* on-chip Shared RAM block S1 */
       RAMS2       : origin = 0x00E000, length = 0x001000     /* on-chip Shared RAM block S2 */
       RAMS3       : origin = 0x00F000, length = 0x001000     /* on-chip Shared RAM block S3 */
       RAMS4       : origin = 0x010000, length = 0x001000     /* on-chip Shared RAM block S4 */
       RAMS5       : origin = 0x011000, length = 0x001000     /* on-chip Shared RAM block S5 */
       RAMS6       : origin = 0x012000, length = 0x001000     /* on-chip Shared RAM block S6 */
       RAMS7       : origin = 0x013000, length = 0x001000     /* on-chip Shared RAM block S7 */

       CTOMRAM     : origin = 0x03F800, length = 0x000380     /* C28 to M3 Message RAM */
       MTOCRAM     : origin = 0x03FC00, length = 0x000380     /* M3 to C28 Message RAM */
       
       FLASHB      : origin = 0x13C000, length = 0x002000     /* on-chip FLASH */
    }

    I can't find the addresses you referenced above. How does CCS decide which one of these regions is being used to flash the controller?

  • Tilli,

    In the .cmd file, there is also a SECTIONS defintion. This is the place where you specify where the sections of your code should be placed in the target memory. For example, the below section definition puts the .text section into FLASH, which is defined to be at address 0x00204000.

    SECTIONS
    {
        .intvecs:   > INTVECS, ALIGN(8)
        .resetisr:  > RESETISR, ALIGN(8)
        .text   :   > FLASH, ALIGN(8)
        .const  :   > FLASH, ALIGN(8)
        .cinit  :   > FLASH, ALIGN(8)
        .pinit  :   > FLASH, ALIGN(8)
        ...

    }

    The version of F28M35M52C1_c28.cmd I'm looking at defines the following MEMORY regions, which corresponds to the flash memory start address of 0x100000 that I posted before:

       FLASHN      : origin = 0x100000, length = 0x002000     /* on-chip FLASH */
       FLASHM      : origin = 0x102000, length = 0x002000     /* on-chip FLASH */
       FLASHL      : origin = 0x104000, length = 0x002000     /* on-chip FLASH */
       FLASHK      : origin = 0x106000, length = 0x002000     /* on-chip FLASH */
       FLASHJ      : origin = 0x108000, length = 0x008000     /* on-chip FLASH */
       FLASHI      : origin = 0x110000, length = 0x008000     /* on-chip FLASH */
       FLASHH      : origin = 0x118000, length = 0x008000     /* on-chip FLASH */
       FLASHG      : origin = 0x120000, length = 0x008000     /* on-chip FLASH */
       FLASHF      : origin = 0x128000, length = 0x008000     /* on-chip FLASH */
       FLASHE       : origin = 0x130000, length = 0x008000      /* on-chip FLASH */
       FLASHD      : origin = 0x138000, length = 0x002000      /* on-chip FLASH */
       FLASHC      : origin = 0x13A000, length = 0x002000      /* on-chip FLASH */
       FLASHA      : origin = 0x13E000, length = 0x001F80      /* on-chip FLASH */

    If you have additional questions on this topic, I encourage you to start a new post on the Code Composer Studio section of the forums. There will be experts there to help you.

    Thanks,

    Ricky