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CCS/TMS320F28377S: TMS320F28377S boot

vladimir vladimir1
Intellectual 565 points

Part Number: TMS320F28377S
Other Parts Discussed in Thread: UNIFLASH, C2000WARE

Tool/software: Code Composer Studio

Hello. I am learning the programming of TMS320f28377S and faced a problem - after programming the controller and resetting the power supply, it does not start. When debugging (JTAG) everything is fine. The GPIO84 and GPIO 72 ports are powered up. The recording goes to flash. We used free sample for experiments . Maybe it can't load from flash?

  • 0
    TI__Guru 50611 points

    Vladimir,

    Just wanted to check you are programming out file generated from flash configuration?

  • 0 in reply to vladimir vladimir1
    TI__Guru 50611 points

    Is this link to your project or file attachment?

  • 0 in reply to Santosh Jha
    Intellectual 565 points

    file attachment: reference_28377s_p540_013.out. (714kB). 

    ----

    Just wanted to check you are programming out file generated from flash configuration?

    -Yes

  • 0 in reply to vladimir vladimir1
    TI__Guru 50611 points

    it will be better if you can just elaborate the project configuration then we can bring right expert.

    Is this on TI board or your custom board? Also, is it your application or one of TI example compiled for Flash configuration?

  • 0 in reply to Santosh Jha
    Intellectual 565 points

    Its my board and my app. What file should I provide you with? File extension?

  • 0 in reply to vladimir vladimir1
    TI__Guru 50611 points

    Can you attach JTAG and check where it is stuck?

  • 0 in reply to vladimir vladimir1
    TI__Guru 50611 points

    Not able to open the link.

    Can you attach the linker command file?

  • 0 in reply to Santosh Jha
    TI__Guru* 87155 points

    Vladimir,

    Santosh asked me to take a look at this post.

    Could you clarify below questions?

    1. Do you have any initialized sections mapped to RAM in your linker cmd file?  If yes, please map them to Flash and copy them to RAM at runtime if needed.  In debugger connected case, RAM content may get loaded to RAM when you load the executable.  In standalone case, it will not be loaded and hence application fails.

    2. Do you have watchdog enabled in your application? If yes, is it serviced regularly to avoid reset?  In debugger connected case, watchdog is disabled by gel file.

    3. Did you notice a toggle on XRSn indicating a reset?

    Thanks and regards,
    Vamsi

  • 0 in reply to Vamsi Gudivada
    Intellectual 565 points

    Hello.watchdog disabled. I did not have a look at XRSn.

    Fullscreen 28377S_FLASH_lnk.cmd.txt Download 
    MEMORY
{
PAGE 0 :  /* Program Memory */
          /* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */
          /* BEGIN is used for the "boot to Flash" bootloader mode   */

   BEGIN           	: origin = 0x080000, length = 0x000002
   RAMM0           	: origin = 0x000122, length = 0x0002DE
   RAMD0           	: origin = 0x00B000, length = 0x000800
   RAMLS0          	: origin = 0x008000, length = 0x000800
   RAMLS1          	: origin = 0x008800, length = 0x000800
   RAMLS2      		: origin = 0x009000, length = 0x000800
   RAMLS3      		: origin = 0x009800, length = 0x000800
   RAMLS4      		: origin = 0x00A000, length = 0x000800
   RAMGS6_15		: origin = 0x012000, length = 0x00A000
  /*
   RAMGS7      		: origin = 0x013000, length = 0x001000
   RAMGS8      		: origin = 0x014000, length = 0x001000
   RAMGS9      		: origin = 0x015000, length = 0x001000
   RAMGS10     		: origin = 0x016000, length = 0x001000
   RAMGS11     		: origin = 0x017000, length = 0x001000
   RAMGS12     		: origin = 0x018000, length = 0x001000
   RAMGS13     		: origin = 0x019000, length = 0x001000
   RAMGS14     		: origin = 0x01A000, length = 0x001000
   RAMGS15     		: origin = 0x01B000, length = 0x001000*/
   RESET           	: origin = 0x3FFFC0, length = 0x000002
   
   /* Flash sectors */
   FLASHA           : origin = 0x080002, length = 0x001FFE	/* on-chip Flash */
   FLASHB           : origin = 0x082000, length = 0x002000	/* on-chip Flash */
   FLASHC           : origin = 0x084000, length = 0x002000	/* on-chip Flash */
   FLASHD           : origin = 0x086000, length = 0x002000	/* on-chip Flash */
   FLASHE           : origin = 0x088000, length = 0x008000	/* on-chip Flash */
   FLASHF           : origin = 0x090000, length = 0x008000	/* on-chip Flash */
   FLASHG           : origin = 0x098000, length = 0x008000	/* on-chip Flash */
   FLASHH           : origin = 0x0A0000, length = 0x008000	/* on-chip Flash */
   FLASHI           : origin = 0x0A8000, length = 0x008000	/* on-chip Flash */
   FLASHJ           : origin = 0x0B0000, length = 0x008000	/* on-chip Flash */
   FLASHK           : origin = 0x0B8000, length = 0x002000	/* on-chip Flash */
   FLASHL           : origin = 0x0BA000, length = 0x002000	/* on-chip Flash */
   FLASHM           : origin = 0x0BC000, length = 0x002000	/* on-chip Flash */
   FLASHN           : origin = 0x0BE000, length = 0x002000	/* on-chip Flash */
   FLASHO           : origin = 0x0C0000, length = 0x002000	/* on-chip Flash */
   FLASHP           : origin = 0x0C2000, length = 0x002000	/* on-chip Flash */
   FLASHQ           : origin = 0x0C4000, length = 0x002000	/* on-chip Flash */   
   FLASHR           : origin = 0x0C6000, length = 0x002000	/* on-chip Flash */
   FLASHS           : origin = 0x0C8000, length = 0x008000	/* on-chip Flash */
   FLASHT           : origin = 0x0D0000, length = 0x008000	/* on-chip Flash */   
   FLASHU           : origin = 0x0D8000, length = 0x008000	/* on-chip Flash */   
   FLASHV           : origin = 0x0E0000, length = 0x008000	/* on-chip Flash */   
   FLASHW           : origin = 0x0E8000, length = 0x008000	/* on-chip Flash */   
   FLASHX           : origin = 0x0F0000, length = 0x008000	/* on-chip Flash */
   FLASHY           : origin = 0x0F8000, length = 0x002000	/* on-chip Flash */
   FLASHZ           : origin = 0x0FA000, length = 0x002000	/* on-chip Flash */
   FLASHAA          : origin = 0x0FC000, length = 0x002000	/* on-chip Flash */   
   FLASHAB          : origin = 0x0FE000, length = 0x002000	/* on-chip Flash */   

PAGE 1 : /* Data Memory */
         /* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */

   BOOT_RSVD       : origin = 0x000002, length = 0x000120     /* Part of M0, BOOT rom will use this for stack */
   RAMM1           : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
   RAMD1           : origin = 0x00B800, length = 0x000800

   RAMLS5      : origin = 0x00A800, length = 0x000800

   RAMGS0      : origin = 0x00C000, length = 0x001000
   RAMGS1      : origin = 0x00D000, length = 0x001000
   RAMGS2      : origin = 0x00E000, length = 0x001000
   RAMGS3      : origin = 0x00F000, length = 0x001000
   RAMGS4      : origin = 0x010000, length = 0x001000
   RAMGS5      : origin = 0x011000, length = 0x001000
}


SECTIONS
{
   /* Allocate program areas: */
   .cinit              : > FLASHB      PAGE = 0, ALIGN(4)
   .pinit              : > FLASHB,     PAGE = 0, ALIGN(4)
   .text               : >> FLASHB | FLASHC | FLASHD | FLASHE      PAGE = 0, ALIGN(4)
   codestart           : > BEGIN       PAGE = 0, ALIGN(4)

#ifdef __TI_COMPILER_VERSION__
   #if __TI_COMPILER_VERSION__ >= 15009000
    .TI.ramfunc : {} LOAD = FLASHI | FLASHJ,
                         RUN = RAMGS6_15,
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_SIZE(_RamfuncsLoadSize),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         RUN_SIZE(_RamfuncsRunSize),
                         RUN_END(_RamfuncsRunEnd),
                         PAGE = 0, ALIGN(4)
   #else
   ramfuncs            : LOAD = FLASHI | FLASHJ,
                         RUN = RAMGS6_15,
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_SIZE(_RamfuncsLoadSize),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         RUN_SIZE(_RamfuncsRunSize),
                         RUN_END(_RamfuncsRunEnd),
                         PAGE = 0, ALIGN(4)   
   #endif
#endif
						 
   /* Allocate uninitalized data sections: */
   .stack              : > RAMM1        PAGE = 1
   .ebss               : >> RAMLS5 | RAMGS0 | RAMGS1       PAGE = 1
   .esysmem            : > RAMLS5       PAGE = 1

   /* Initalized sections go in Flash */
   .econst             : >> FLASHF | FLASHG | FLASHH      PAGE = 0, ALIGN(4)
   .switch             : > FLASHB      PAGE = 0, ALIGN(4)
   
   .reset              : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */
   
    /* The following section definition are for IQMATH */
   IQmath           : > RAMGS5, PAGE=1
   IQmathTables     : > RAMGS5, PAGE=1
   IQmathTablesRam  : > RAMGS4, PAGE=1

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

  • 0 in reply to vladimir vladimir1
    TI__Guru* 87155 points

    Vladimir,

    Thank you for the linker cmd file.

    1) Please check if there is a toggle on XRSn.

    2) Did you use memcpy() to copy the .TI.ramfunc content from Flash to RAM?  You might have done this since you said application worked with debugger - but please check and confirm.

    3) Did you change any default settings in CCS On-Chip Flash Plugin GUI?  Please make sure that AutoEccGeneration is enabled.

    4) I don't see any glaring issues in linker cmd that can cause this.  But, please fix below two things:

    a) Use ALIGN(8) instead of ALIGN(4) for Flash mapped sections - This aligns sections on 128-bit boundary instead of 64-bit boundary.  It matters when you use Flash programming tools other than CCS Flash Plugin and UniFlash.

    b) Reserve the last 16 16-bit words of the Flash banks to avoid ECC errors and/or ITRAP due to prefetch beyond implemented Flash memory.

    Thanks and regards,
    Vamsi

  • 0 in reply to Vamsi Gudivada
    Intellectual 565 points

    1. Checked. All fine

    2. Checked, All fine

    3. Not change

    4. Did. Nothing has changed

  • 0 in reply to Vamsi Gudivada
    Intellectual 565 points

    I disabled writing speed-critical program code to RAMFUNC memory. After that, the program for some reason does not fit in flash, although its size is smaller than the size of FLASHE|FLASHF|FLASHG|FLASHH|,Why did this happen?

  • 0 in reply to vladimir vladimir1
    TI__Guru* 87155 points

    Vladimir,

    Regarding the compile error: Try to merge those 4 Flash sectors in to single memory in the memory section of the linker cmd file (shown below) and allocate .text section to that.  See if that helps.

    FLASHEFGH: : origin = 0x088000, length = 0x20000 /* on-chip Flash */

    Coming to the original debug:  On your board, can you try one of the C2000Ware examples with Flash build configuration and see whether or not it works fine standalone with a power cycle?  Examples should work.  If not, you may need to concentrate on your board.

    Thanks and regards,

    Vamsi

  • 0 in reply to Vamsi Gudivada
    Intellectual 565 points 
    I figured it out, but why  this code:  
      .text               : >> FLASHB | FLASHC | FLASHD | FLASHE      PAGE = 0, ALIGN(8)

    not work?

    I have a suspicion that I have something with the default bootloader. The processor was received as a free sample. Maybe there is something already there and I can't use it as I want? There are no questions about the Board - it was copied from launchpad.The combination of gpio corresponds to the required one. Is it possible to force the processor to boot from flash using standard tools so that it doesn't scan the ports?

  • 0 in reply to vladimir vladimir1
    TI__Guru* 87155 points

    Vladimir,

    I think the linker tries to place all the functions in a given source file or library in to one memory block defined in the linker cmd file.  Hence, I suggested to club the sectors in to one memory block entry in the linker cmd file.

    What did you do to fix the error?  Did you use the "Place each function in a separate subsection" option in build settings to avoid this error?

    Regarding the debug: 

    I don't think it is to do with the sample. Can you attach a picture of the device?

    Did you try to run a C2000Ware example in Flash build configuration? Did it work fine for you?

    Flash boot on this device is achieved only by using GPIO72/84.  

    Thanks and regards,
    Vamsi

  • 0 in reply to Vamsi Gudivada
    Intellectual 565 points

    I found an error in cmd file - iq tables attached to rom. When i changed them to flash, all became fine. How use gpio72,gpio84?

  • 0 in reply to vladimir vladimir1
    TI__Guru* 87155 points

    Vladimir,

    Ok.

    Please see Table 3-3. Device Default Boot Modes in TRM at http://www.ti.com/lit/ug/spruhx5e/spruhx5e.pdf for the boot mode pin configuration details.

    Thanks and regards,
    Vamsi