TMS320F28377D: 28377D's Manchester decoding SDFM with AMC1306E25

Lee,

We don't recommend using manchester mode (mode2) for both F2837xD, F2837xS, F2807x and F28004x series of devices. Reason are mentioned in advisory shown below which will be updated in future DS and errata.

Below thread provides the background behind the recommendation and DS update.

Now, coming to your question: You can time your PWM interrupt in such a way to read filter results. On PWM SDSYNC event, you have wait for atleast latency of sinc filter selected + additional 5 SD-Cx cycles to read correct filter results

Regards,

Manoj

Hi Manoj,

Thanks for your advice and I didn't know weird-behavior in the thread.

In my case, the target of voltage sensing is a dc-bus voltage of which dominant frequency is double line frequency (120 Hz) and control dynamic is also very slow (1-3 Hz), which is relatively very slow.

And, since a power stage with clock source and in-house control board were already designed according to the TI guideline, I must try any possible ways to utilize the system. So I will let you know if any update or ask further questions later.

Thank you,

Moonhyun

Hi Manoj,

So the threads are saying that if the external clock frequency is in integer relationship with DSP system clock frequency, then, there would be data skipping and incorrect filtering effect in DSP? (e.g. Crystal oscillator 20 MHz & DSP sysclk 200 MHz)

Please let me know. 

Thanks,

Moonhyun