Tool/software: Code Composer Studio
Hello Everyone,
This is the first time i am using a DSP kit. I want to change the phase of one PWM output with reference to another PWM. The purpose is to drive a phase shift inverter. I got help from some example codes and manual. I am able to change the phase on the base of a feedback, i am also using a PI controller. But the problem is that i face a small glitch in the output of the PWM which phase is being changed. It seems to be some kind of false triggering. I can not understand what is wrong.
// TI File $Revision: /main/1 $ // Checkin $Date: August 18, 2006 13:46:19 $ //########################################################################### // // FILE: DSP2833x_EPwm.c // // TITLE: DSP2833x ePWM Initialization & Support Functions. // //########################################################################### // $TI Release: DSP2833x/DSP2823x C/C++ Header Files V1.31 $ // $Release Date: August 4, 2009 $ //########################################################################### #include "DSP2833x_Device.h" // DSP2833x Headerfile Include File #include "DSP2833x_Examples.h" // DSP2833x Examples Include File //--------------------------------------------------------------------------- // InitEPwm: //--------------------------------------------------------------------------- // This function initializes the ePWM(s) to a known state. // void InitEPwm(void) { // EPWM Module 1 Config /////////////////////////////////////////////////////////////////////////////////////////////////////// EPwm1Regs.TBPRD = 441; // 84KHZ (150MHZ) EPwm1Regs.CMPA.half.CMPA = 220; // D = 0.1 EPwm1Regs.TBPHS.half.TBPHS = 0; // Phase is 0 //Setup TBCLK EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Up Down Count (Symmetrical) EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE; // Phase Loading Disabled EPwm1Regs.TBCTL.bit.PRDLD = TB_SHADOW; EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW; EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // Load On CTR = Zero EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO; // Load On CTR = Zero // Set Actions EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR; EPwm1Regs.AQCTLA.bit.CAD = AQ_SET; EPwm1Regs.DBCTL.bit.OUT_MODE = 0; // EPWM Module 2 Config EPwm2Regs.TBPRD = 441; // 84KHZ (150MHZ) EPwm2Regs.CMPA.half.CMPA = 220; // D = 0.1 EPwm2Regs.TBPHS.half.TBPHS = 220; // Phase is 0 //Setup TBCLK EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Up Down Count (Symmetrical) EPwm2Regs.TBCTL.bit.PHSEN = TB_ENABLE; // Phase Loading Disabled EPwm2Regs.TBCTL.bit.PHSDIR = TB_UP; EPwm2Regs.TBCTL.bit.PRDLD = TB_SHADOW; EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN; EPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW; EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW; EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO; // Load On CTR = Zero EPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO; // Load On CTR = Zero // Set Actions EPwm2Regs.AQCTLA.bit.CAU = AQ_CLEAR; EPwm2Regs.AQCTLA.bit.CAD = AQ_SET; EPwm2Regs.DBCTL.bit.OUT_MODE = 0; /////////////////////////////////////////////////////////////////////////////////////////////////////// // Interrupt where we will modify the deadband EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO; // Enable event time-base counter equal to zero. (TBCTR = 0x0000) EPwm1Regs.ETSEL.bit.INTEN = 1; // Enable EPWMx_INT EPwm1Regs.ETPS.bit.INTPRD = 1; // Generate INT on 2rd event EPwm1Regs.ETCLR.bit.INT = 1; // Clears the ETFLG[INT] flag bit and enable further interrupts pulses to be generated // Set up Event Trigger and Start of Conversion with CNT_period enable for Time-base of EPWM1 EPwm1Regs.ETSEL.bit.SOCAEN = 1; // Enable EPWMxSOCA pulse EPwm1Regs.ETSEL.bit.SOCBEN = 0; // Disable EPWMxSOCB pulse EPwm1Regs.ETSEL.bit.SOCASEL = ET_CTR_ZERO; // Enable event time-base counter equal to period.(TBCTR = Zero) EPwm1Regs.ETSEL.bit.SOCBSEL = ET_CTR_ZERO; // Enable event time-base counter equal to period (TBCTR = Zero) EPwm1Regs.ETPS.bit.SOCAPRD = ET_1ST; // Generate the EPWMxSOCA pulse on the first event EPwm1Regs.ETPS.bit.SOCBPRD = ET_DISABLE; // Generate the EPWMxSOCB pulse on the first event EPwm1Regs.ETCLR.bit.SOCA = 1; // Clear SOCA flag EPwm1Regs.ETCLR.bit.SOCB = 1; // Clear SOCB flag } //--------------------------------------------------------------------------- // Example: InitEPwmGpio: //--------------------------------------------------------------------------- // This function initializes GPIO pins to function as ePWM pins // // Each GPIO pin can be configured as a GPIO pin or up to 3 different // peripheral functional pins. By default all pins come up as GPIO // inputs after reset. // void InitEPwmGpio(void) { InitEPwm1Gpio(); InitEPwm2Gpio(); InitEPwm3Gpio(); #if DSP28_EPWM4 InitEPwm4Gpio(); #endif // endif DSP28_EPWM4 #if DSP28_EPWM5 InitEPwm5Gpio(); #endif // endif DSP28_EPWM5 #if DSP28_EPWM6 InitEPwm6Gpio(); #endif // endif DSP28_EPWM6 } void InitEPwm1Gpio(void) { EALLOW; /* Enable internal pull-up for the selected pins */ // Pull-ups can be enabled or disabled by the user. // This will enable the pullups for the specified pins. // Comment out other unwanted lines. GpioCtrlRegs.GPAPUD.bit.GPIO0 = 0; // Enable pull-up on GPIO0 (EPWM1A) GpioCtrlRegs.GPAPUD.bit.GPIO1 = 0; // Enable pull-up on GPIO1 (EPWM1B) /* Configure ePWM-1 pins using GPIO regs*/ // This specifies which of the possible GPIO pins will be ePWM1 functional pins. // Comment out other unwanted lines. GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1; // Configure GPIO0 as EPWM1A GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1; // Configure GPIO1 as EPWM1B EDIS; } void InitEPwm2Gpio(void) { EALLOW; /* Enable internal pull-up for the selected pins */ // Pull-ups can be enabled or disabled by the user. // This will enable the pullups for the specified pins. // Comment out other unwanted lines. GpioCtrlRegs.GPAPUD.bit.GPIO2 = 0; // Enable pull-up on GPIO2 (EPWM2A) GpioCtrlRegs.GPAPUD.bit.GPIO3 = 0; // Enable pull-up on GPIO3 (EPWM3B) /* Configure ePWM-2 pins using GPIO regs*/ // This specifies which of the possible GPIO pins will be ePWM2 functional pins. // Comment out other unwanted lines. GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1; // Configure GPIO2 as EPWM2A GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 1; // Configure GPIO3 as EPWM2B EDIS; } void InitEPwm3Gpio(void) { EALLOW; /* Enable internal pull-up for the selected pins */ // Pull-ups can be enabled or disabled by the user. // This will enable the pullups for the specified pins. // Comment out other unwanted lines. GpioCtrlRegs.GPAPUD.bit.GPIO4 = 0; // Enable pull-up on GPIO4 (EPWM3A) GpioCtrlRegs.GPAPUD.bit.GPIO5 = 0; // Enable pull-up on GPIO5 (EPWM3B) /* Configure ePWM-3 pins using GPIO regs*/ // This specifies which of the possible GPIO pins will be ePWM3 functional pins. // Comment out other unwanted lines. GpioCtrlRegs.GPAMUX1.bit.GPIO4 = 1; // Configure GPIO4 as EPWM3A GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 1; // Configure GPIO5 as EPWM3B EDIS; } #if DSP28_EPWM4 void InitEPwm4Gpio(void) { EALLOW; // Enable internal pull-up for the selected pins */ // Pull-ups can be enabled or disabled by the user. // This will enable the pullups for the specified pins. // Comment out other unwanted lines. GpioCtrlRegs.GPAPUD.bit.GPIO6 = 0; // Enable pull-up on GPIO6 (EPWM4A) GpioCtrlRegs.GPAPUD.bit.GPIO7 = 0; // Enable pull-up on GPIO7 (EPWM4B) /* Configure ePWM-4 pins using GPIO regs*/ // This specifies which of the possible GPIO pins will be ePWM4 functional pins. // Comment out other unwanted lines. GpioCtrlRegs.GPAMUX1.bit.GPIO6 = 1; // Configure GPIO6 as EPWM4A GpioCtrlRegs.GPAMUX1.bit.GPIO7 = 1; // Configure GPIO7 as EPWM4B } EDIS; #endif // endif DSP28_EPWM4 #if DSP28_EPWM5 void InitEPwm5Gpio(void) { EALLOW; /* Enable internal pull-up for the selected pins */ // Pull-ups can be enabled or disabled by the user. // This will enable the pullups for the specified pins. // Comment out other unwanted lines. GpioCtrlRegs.GPAPUD.bit.GPIO8 = 0; // Enable pull-up on GPIO8 (EPWM5A) GpioCtrlRegs.GPAPUD.bit.GPIO9 = 0; // Enable pull-up on GPIO9 (EPWM5B) /* Configure ePWM-5 pins using GPIO regs*/ // This specifies which of the possible GPIO pins will be ePWM5 functional pins. // Comment out other unwanted lines. GpioCtrlRegs.GPAMUX1.bit.GPIO8 = 1; // Configure GPIO8 as EPWM5A GpioCtrlRegs.GPAMUX1.bit.GPIO9 = 1; // Configure GPIO9 as EPWM5B EDIS; } #endif // endif DSP28_EPWM5 #if DSP28_EPWM6 void InitEPwm6Gpio(void) { EALLOW; /* Enable internal pull-up for the selected pins */ // Pull-ups can be enabled or disabled by the user. // This will enable the pullups for the specified pins. // Comment out other unwanted lines. GpioCtrlRegs.GPAPUD.bit.GPIO10 = 0; // Enable pull-up on GPIO10 (EPWM6A) GpioCtrlRegs.GPAPUD.bit.GPIO11 = 0; // Enable pull-up on GPIO11 (EPWM6B) /* Configure ePWM-6 pins using GPIO regs*/ // This specifies which of the possible GPIO pins will be ePWM6 functional pins. // Comment out other unwanted lines. GpioCtrlRegs.GPAMUX1.bit.GPIO10 = 1; // Configure GPIO10 as EPWM6A GpioCtrlRegs.GPAMUX1.bit.GPIO11 = 1; // Configure GPIO11 as EPWM6B EDIS; } #endif // endif DSP28_EPWM6 //--------------------------------------------------------------------------- // Example: InitEPwmSyncGpio: //--------------------------------------------------------------------------- // This function initializes GPIO pins to function as ePWM Synch pins // void InitEPwmSyncGpio(void) { EALLOW; /* Configure EPWMSYNCI */ /* Enable internal pull-up for the selected pins */ // Pull-ups can be enabled or disabled by the user. // This will enable the pullups for the specified pins. // Comment out other unwanted lines. GpioCtrlRegs.GPAPUD.bit.GPIO6 = 0; // Enable pull-up on GPIO6 (EPWMSYNCI) // GpioCtrlRegs.GPBPUD.bit.GPIO32 = 0; // Enable pull-up on GPIO32 (EPWMSYNCI) /* Set qualification for selected pins to asynch only */ // This will select synch to SYSCLKOUT for the selected pins. // Comment out other unwanted lines. GpioCtrlRegs.GPAQSEL1.bit.GPIO6 = 0; // Synch to SYSCLKOUT GPIO6 (EPWMSYNCI) // GpioCtrlRegs.GPBQSEL1.bit.GPIO32 = 0; // Synch to SYSCLKOUT GPIO32 (EPWMSYNCI) /* Configure EPwmSync pins using GPIO regs*/ // This specifies which of the possible GPIO pins will be EPwmSync functional pins. // Comment out other unwanted lines. GpioCtrlRegs.GPAMUX1.bit.GPIO6 = 2; // Enable pull-up on GPIO6 (EPWMSYNCI) // GpioCtrlRegs.GPBMUX1.bit.GPIO32 = 2; // Enable pull-up on GPIO32 (EPWMSYNCI) /* Configure EPWMSYNC0 */ /* Enable internal pull-up for the selected pins */ // Pull-ups can be enabled or disabled by the user. // This will enable the pullups for the specified pins. // Comment out other unwanted lines. // GpioCtrlRegs.GPAPUD.bit.GPIO6 = 0; // Enable pull-up on GPIO6 (EPWMSYNC0) GpioCtrlRegs.GPBPUD.bit.GPIO33 = 0; // Enable pull-up on GPIO33 (EPWMSYNC0) // GpioCtrlRegs.GPAMUX1.bit.GPIO6 = 3; // Enable pull-up on GPIO6 (EPWMSYNC0) GpioCtrlRegs.GPBMUX1.bit.GPIO33 = 2; // Enable pull-up on GPIO33 (EPWMSYNC0) } //--------------------------------------------------------------------------- // Example: InitTzGpio: //--------------------------------------------------------------------------- // This function initializes GPIO pins to function as Trip Zone (TZ) pins // // Each GPIO pin can be configured as a GPIO pin or up to 3 different // peripheral functional pins. By default all pins come up as GPIO // inputs after reset. // void InitTzGpio(void) { EALLOW; /* Enable internal pull-up for the selected pins */ // Pull-ups can be enabled or disabled by the user. // This will enable the pullups for the specified pins. // Comment out other unwanted lines. GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0; // Enable pull-up on GPIO12 (TZ1) GpioCtrlRegs.GPAPUD.bit.GPIO13 = 0; // Enable pull-up on GPIO13 (TZ2) GpioCtrlRegs.GPAPUD.bit.GPIO14 = 0; // Enable pull-up on GPIO14 (TZ3) // GpioCtrlRegs.GPAPUD.bit.GPIO15 = 0; // Enable pull-up on GPIO15 (TZ4) // GpioCtrlRegs.GPAPUD.bit.GPIO16 = 0; // Enable pull-up on GPIO16 (TZ5) // GpioCtrlRegs.GPAPUD.bit.GPIO28 = 0; // Enable pull-up on GPIO28 (TZ5) // GpioCtrlRegs.GPAPUD.bit.GPIO17 = 0; // Enable pull-up on GPIO17 (TZ6) // GpioCtrlRegs.GPAPUD.bit.GPIO29 = 0; // Enable pull-up on GPIO29 (TZ6) /* Set qualification for selected pins to asynch only */ // Inputs are synchronized to SYSCLKOUT by default. // This will select asynch (no qualification) for the selected pins. // Comment out other unwanted lines. GpioCtrlRegs.GPAQSEL1.bit.GPIO12 = 3; // Asynch input GPIO12 (TZ1) GpioCtrlRegs.GPAQSEL1.bit.GPIO13 = 3; // Asynch input GPIO13 (TZ2) GpioCtrlRegs.GPAQSEL1.bit.GPIO14 = 3; // Asynch input GPIO14 (TZ3) // GpioCtrlRegs.GPAQSEL1.bit.GPIO15 = 3; // Asynch input GPIO15 (TZ4) // GpioCtrlRegs.GPAQSEL2.bit.GPIO16 = 3; // Asynch input GPIO16 (TZ5) // GpioCtrlRegs.GPAQSEL2.bit.GPIO28 = 3; // Asynch input GPIO28 (TZ5) // GpioCtrlRegs.GPAQSEL2.bit.GPIO17 = 3; // Asynch input GPIO17 (TZ6) // GpioCtrlRegs.GPAQSEL2.bit.GPIO29 = 3; // Asynch input GPIO29 (TZ6) /* Configure TZ pins using GPIO regs*/ // This specifies which of the possible GPIO pins will be TZ functional pins. // Comment out other unwanted lines. GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 1; // Configure GPIO12 as TZ1 GpioCtrlRegs.GPAMUX1.bit.GPIO13 = 1; // Configure GPIO13 as TZ2 GpioCtrlRegs.GPAMUX1.bit.GPIO14 = 1; // Configure GPIO14 as TZ3 // GpioCtrlRegs.GPAMUX1.bit.GPIO15 = 1; // Configure GPIO15 as TZ4 // GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 3; // Configure GPIO16 as TZ5 // GpioCtrlRegs.GPAMUX2.bit.GPIO28 = 3; // Configure GPIO28 as TZ5 // GpioCtrlRegs.GPAMUX2.bit.GPIO17 = 3; // Configure GPIO17 as TZ6 // GpioCtrlRegs.GPAMUX2.bit.GPIO29 = 3; // Configure GPIO29 as TZ6 EDIS; } void InitPwmTZInt(void) //20140725 { EALLOW; EPwm1Regs.TZSEL.bit.OSHT1 = 1; // What do we want the TZ1 and TZ2 to do? EPwm1Regs.TZCTL.bit.TZA = TZ_FORCE_LO; EPwm1Regs.TZCTL.bit.TZB = TZ_FORCE_LO; // Enable TZ interrupt EPwm1Regs.TZEINT.bit.OST = 1; EPwm2Regs.TZSEL.bit.OSHT1 = 1; // What do we want the TZ1 and TZ2 to do? EPwm2Regs.TZCTL.bit.TZA = TZ_FORCE_LO; EPwm2Regs.TZCTL.bit.TZB = TZ_FORCE_LO; // Enable TZ interrupt EPwm2Regs.TZEINT.bit.OST = 1; EPwm3Regs.TZSEL.bit.OSHT1 = 1; //20150625 // What do we want the TZ1 and TZ2 to do? EPwm3Regs.TZCTL.bit.TZA = TZ_FORCE_LO; EPwm3Regs.TZCTL.bit.TZB = TZ_FORCE_LO; // Enable TZ interrupt EPwm3Regs.TZEINT.bit.OST = 1; /* EPwm4Regs.TZSEL.bit.OSHT1 = 1; // What do we want the TZ1 and TZ2 to do? EPwm4Regs.TZCTL.bit.TZA = TZ_FORCE_LO; EPwm4Regs.TZCTL.bit.TZB = TZ_FORCE_LO; // Enable TZ interrupt EPwm4Regs.TZEINT.bit.OST = 1; EPwm5Regs.TZSEL.bit.OSHT1 = 1; // What do we want the TZ1 and TZ2 to do? EPwm5Regs.TZCTL.bit.TZA = TZ_FORCE_LO; EPwm5Regs.TZCTL.bit.TZB = TZ_FORCE_LO; // Enable TZ interrupt EPwm5Regs.TZEINT.bit.OST = 1; EPwm6Regs.TZSEL.bit.OSHT1 = 1; // What do we want the TZ1 and TZ2 to do? EPwm6Regs.TZCTL.bit.TZA = TZ_FORCE_LO; EPwm6Regs.TZCTL.bit.TZB = TZ_FORCE_LO; // Enable TZ interrupt EPwm6Regs.TZEINT.bit.OST = 1; */ EDIS; } //=========================================================================== // End of file. //=========================================================================== //NEW file #include "DSP28x_Project.h" // Device Headerfile and Examples Include File #include <math.h> float ADC_data[8] = {0.,0.,0.,0.,0.,0.,0.,0.}; float VO_REF_TX1_Ref = 0., VO_REF_F_TX1_Ref = 1.5; // Setting Output Voltage Reference float VO_TX1_Ref = 0.; // Setting Initial Output Voltage float VO_Old_TX1_Ref = 0., VO_LPF_TX1_Ref = 0., VO_LPF_Old_TX1_Ref = 0.; float BW = 840000, TS = 1/84000.; // BW: Cutoff Frequency of RC Low-Pass Filter, TS: Sampling Period float VError_TX1_Ref = 0., VError_Int_TX1_Ref = 0., VError_Prop_TX1_Ref = 0., VError_Total_TX1_Ref = 0., Ki_TX1_Ref = 0.001, Kp_TX1_Ref = 1.; float Ad633_REF_TX1_Phy = 0., Ad633_REF_F_TX1_Phy = 1.65; // Ad633 Reference float Ad633_TX1_Phy = 0.; // Setting Initial Output Voltage float Ad633_Old_TX1_Phy = 0., Ad633_LPF_TX1_Phy = 0., Ad633_LPF_Old_TX1_Phy = 0.; float VError_TX1_Phy = 0., VError_Int_TX1_Phy = 0., VError_Prop_TX1_Phy = 0., VError_Total_TX1_Phy = 0., Ki_TX1_Phy = 0.001, Kp_TX1_Phy = 1.; #define PWM123_ON {GpioDataRegs.GPASET.bit.GPIO14 = 1;} #define PWM123_OFF {GpioDataRegs.GPACLEAR.bit.GPIO14 = 1;} #define PWM456_ON {GpioDataRegs.GPASET.bit.GPIO15 = 1;} #define PWM456_OFF {GpioDataRegs.GPACLEAR.bit.GPIO15 = 1;} #define DO1_ON {GpioDataRegs.GPCSET.bit.GPIO79 = 1;} #define DO1_OFF {GpioDataRegs.GPCCLEAR.bit.GPIO79 = 1;} #define DO2_ON {GpioDataRegs.GPCSET.bit.GPIO78 = 1;} #define DO2_OFF {GpioDataRegs.GPCCLEAR.bit.GPIO78 = 1;} interrupt void epwm1_timer_isr(void); void InitPwmTZInt(void); /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// // MAIN Function // /////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// void main(void) { InitSysCtrl(); InitGpio(); InitSpiaGpio(); InitEPwmGpio(); InitTzGpio(); InitMcbspa16bit(); InitMcbspaGpio(); DINT; InitPieCtrl(); IER = 0x0000; IFR = 0x0000; InitPieVectTable(); EALLOW; // This is needed to write to EALLOW protected registers PieVectTable.EPWM1_INT = &epwm1_timer_isr; EDIS; EALLOW; SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0; EDIS; //----------Initiate Pheriperal module--------------// InitEPwm(); InitAdc(); InitSpi(); InitMcbsp(); InitCpuTimers(); // For this example, only initialize the Cpu Timers //-------------------------------------------------------------------------------------// EALLOW; SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1; //epwm module time base clock sync. globally synchronize all pwm module. EDIS; IER |= M_INT3; //EPWM1_INT PieCtrlRegs.PIEIER3.bit.INTx1 = 1; // Enable global Interrupts and higher priority real-time debug events: EINT; // Enable Global interrupt INTM ERTM; // Enable Global realtime interrupt DBGM PWM123_ON; for(;;) { } } interrupt void epwm1_timer_isr(void) { while(AdcRegs.ADCST.bit.SEQ1_BSY==1){}; ADC_data[0]=AdcRegs.ADCRESULT0>>4; // AD633 Out TX1 // ADC_data[1]=AdcRegs.ADCRESULT2>>4; // DC current TX1 // ADC_data[2]=AdcRegs.ADCRESULT4>>4; // Coil Current Tx1 //P or I controller for Phase Sync loop starts here //------------------------------------------------------------------------------------------------------------------------------------------------------------------ { Ad633_TX1_Phy = (float)(ADC_data[0])*3./4096.; Ad633_LPF_TX1_Phy = 1/(2 + BW*TS)*((2 - BW*TS)*Ad633_LPF_Old_TX1_Phy + BW*TS*(Ad633_TX1_Phy + Ad633_Old_TX1_Phy)); // RC Low-Pass Filter (Tustin's Method - s = 2/TS*(1 - Z^-1)/(1 + Z^-1) Ad633_Old_TX1_Phy = Ad633_TX1_Phy; Ad633_LPF_Old_TX1_Phy = Ad633_LPF_TX1_Phy; //PI Controller Ad633_REF_TX1_Phy = Ad633_REF_TX1_Phy + 1.; // Soft Start-Up: 84kHz마다 +1씩 상승 (따로 설정 할 것!) if (Ad633_REF_TX1_Phy >= Ad633_REF_F_TX1_Phy) { Ad633_REF_TX1_Phy = Ad633_REF_F_TX1_Phy; } VError_TX1_Phy = Ad633_REF_TX1_Phy - Ad633_LPF_TX1_Phy; VError_Int_TX1_Phy = VError_Int_TX1_Phy + Ki_TX1_Phy*VError_TX1_Phy*TS; VError_Prop_TX1_Phy = Kp_TX1_Phy*VError_TX1_Phy; VError_Total_TX1_Phy = VError_Int_TX1_Phy + VError_Prop_TX1_Phy; if(VError_Total_TX1_Phy >=1) // Upper Limit = 0.9; (맞게 설정할 것!) {VError_Total_TX1_Phy = 1;} if(VError_Total_TX1_Phy <= 0.) // Lower Limit = 0; {VError_Total_TX1_Phy = 0.;} // EPwm1Regs.TBPRD = EPwm1Regs.TBPRD+VError_Int_TX1_Phy; // // EPwm2Regs.TBPRD=EPwm1Regs.TBPRD ; } //------------------------------------------------------------------------------------------------------------------------------------------------------------------ //P or I controller for Phase Sync loop ends here //PI for Reflected resistance loop starts here //------------------------------------------------------------------------------------------------------------------------------------------------------------------ { VO_TX1_Ref = (float)(ADC_data[0])*3./4096.; VO_LPF_TX1_Ref = 1/(2 + BW*TS)*((2 - BW*TS)*VO_LPF_Old_TX1_Ref + BW*TS*(VO_TX1_Ref + VO_Old_TX1_Ref)); // RC Low-Pass Filter (Tustin's Method - s = 2/TS*(1 - Z^-1)/(1 + Z^-1) VO_Old_TX1_Ref = VO_TX1_Ref; VO_LPF_Old_TX1_Ref = VO_LPF_TX1_Ref; //PI Controller VO_REF_TX1_Ref = VO_REF_TX1_Ref + 1.; // Soft Start-Up: 84kHz마다 +1씩 상승 (따로 설정 할 것!) if(VO_REF_TX1_Ref >= VO_REF_F_TX1_Ref) { VO_REF_TX1_Ref = VO_REF_F_TX1_Ref; } VError_TX1_Ref = VO_REF_TX1_Ref - VO_LPF_TX1_Ref; VError_Int_TX1_Ref = VError_Int_TX1_Ref + Ki_TX1_Ref*VError_TX1_Ref*TS; VError_Prop_TX1_Ref = Kp_TX1_Ref*VError_TX1_Ref; VError_Total_TX1_Ref = VError_Int_TX1_Ref + VError_Prop_TX1_Ref; if(VError_Total_TX1_Ref >=1) // Upper Limit = 0.9; (맞게 설정할 것!) {VError_Total_TX1_Ref = 1;} if(VError_Total_TX1_Ref <= 0.) // Lower Limit = 0; {VError_Total_TX1_Ref = 0.;} if(EPwm1Regs.TBPRD*(1-VError_Total_TX1_Ref)<2) EPwm2Regs.TBPHS.half.TBPHS = 2; else if(EPwm2Regs.TBPHS.half.TBPHS = EPwm1Regs.TBPRD*(1-VError_Total_TX1_Ref)>438) EPwm2Regs.TBPHS.half.TBPHS = 438; else { EPwm2Regs.TBPHS.half.TBPHS = EPwm1Regs.TBPRD*(1-VError_Total_TX1_Ref); } EPwm2Regs.TBCTL.bit.PHSDIR = TB_UP; } //------------------------------------------------------------------------------------------------------------------------------------------------------------------ //PI for Reflected resistance loop ends here GpioDataRegs.GPCSET.bit.GPIO72 = 1; AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1; GpioDataRegs.GPCCLEAR.bit.GPIO72 = 1; /////////////////////////////////////////////////////////////////////////////////////////////////////// EDIS; EPwm1Regs.ETCLR.bit.INT = 1; // Clear INT flag for this timer PieCtrlRegs.PIEACK.all = PIEACK_GROUP3; // Acknowledge this interrupt to receive more interrupts from group 3 } //end of new file