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TMS320F280049C: SDFM example problem during debugging

DJ-NG
Genius 9355 points
Part Number: TMS320F280049C
Other Parts Discussed in Thread: C2000WARE, AMC1306EVM, AMC1303EVM

Hi C2000 champs!

Customer tried to run the sdfm example code (C2000 Ware 3.02) for the sdfm function of the TI TMS320F280049C (Launchpad) with two different evaluation boards .
The first one was the AMC1306EMV and the second one was the AMC1306EMV both without Manchester encoding.

The following configuration was used to test the example given within the c2000ware.

-       SDFM Example Code 1

-       AMC1306EVM with external CLK (10MHz) a bit-stream measured with the Oscilloscope, Found OK.

-       AMC1303EVM a bit-stream measured with the oscilloscope, Found OK.

-       The Analog input of the ADC was connected to GND

-       The CLK of the ADC was connected to GPIO 25 (Pin 31 on the board, filter 1)

-        The data-output of the ADC was connected to GPIO 24 (Pin 55 on the board, wrong documentation from TI, filter 1)

-       Filter 2, 3 and 4 were not connected.
         In a second configuration we checked with all 4 data and CLK filter inputs connected to each other.
         A third configuration was like the first configuration but with all obvious code for filter 2, 3 and 4 excluded.

-       The breakpoint mentioned in the comments of the example was set

-       The pin configurations mentioned above were given in the comments of the code

-       C2000ware version 3.02

Problem:

The code was paused within a debug session and was found the most times in the While (1) loop.

Sometimes it was in the sdfm1ErrorISR interrupt for no noticeable reason.

We observed the variable filter1Result but did not get any data.

Can you help to find root cause ?

  • 0
    TI__Guru 55700 points

    DJ,

    Some debugging questions which can help us root cause this problem...

    1) What is the contents of SDIFLG register (32-bit register in hex) when you see the failure? Do you see modulator flag set?

    2) Did you make sure Master Filter Enable bit (MFE bit) is set?

    3) Did you make sure Filter Enable bit (FEN bit) is set?

    4) Will you be able to provide a memory dump of contents from 0x5E00 - 0x5E7F?

    5) Are you running the example code as it provided in C2000Ware?

    Regards,

    Manoj

  • 0 in reply to Manoj Santha Mohan
    Prodigy 100 points

    Hello Manoj,

    DJ helpt me with my problem so i will answer you directly. 

    Manoj Santha Mohan said:

    1) What is the contents of SDIFLG register (32-bit register in hex) when you see the failure? Do you see modulator flag set?

    The SDIFLG register content is : 0x80001E00.

    So for filter 2-4  the Modulator failure Flag is set and for filter 1 the acknowledge flag is set. 

    Manoj Santha Mohan said:

    2) Did you make sure Master Filter Enable bit (MFE bit) is set?

    MFE is set .

    Manoj Santha Mohan said:

    3) Did you make sure Filter Enable bit (FEN bit) is set?

    FEN is also set.

    Manoj Santha Mohan said:

    4) Will you be able to provide a memory dump of contents from 0x5E00 - 0x5E7F?

    This is the content from all SDFM registers:

    R Sdfm1Regs_SDIFLG 0x0000000B 0x80001E00
    R Sdfm1Regs_SDIFLGCLR 0x0000000B 0x00000000
    R Sdfm1Regs_SDCTL 0x0000000F 0x2000
    R Sdfm1Regs_SDMFILEN 0x0000000F 0x0800
    R Sdfm1Regs_SDSTATUS 0x0000000F 0x0000
    R Sdfm1Regs_SDCTLPARM1 0x0000000F 0x0000
    R Sdfm1Regs_SDDFPARM1 0x0000000F 0x0F7F
    R Sdfm1Regs_SDDPARM1 0x0000000F 0x3800
    R Sdfm1Regs_SDCMPH1 0x0000000F 0x0000
    R Sdfm1Regs_SDCMPL1 0x0000000F 0x0000
    R Sdfm1Regs_SDCPARM1 0x0000000F 0x039F
    R Sdfm1Regs_SDDATA1 0x0000000B 0xFFF10000
    R Sdfm1Regs_SDDATFIFO1 0x0000000B 0x00000000
    R Sdfm1Regs_SDCDATA1 0x0000000F 0x0000
    R Sdfm1Regs_SDCMPHZ1 0x0000000F 0x0000
    R Sdfm1Regs_SDFIFOCTL1 0x0000000F 0x0000
    R Sdfm1Regs_SDSYNC1 0x0000000F 0x0400
    R Sdfm1Regs_SDCTLPARM2 0x0000000F 0x0000
    R Sdfm1Regs_SDDFPARM2 0x0000000F 0x0F7F
    R Sdfm1Regs_SDDPARM2 0x0000000F 0x3800
    R Sdfm1Regs_SDCMPH2 0x0000000F 0x0000
    R Sdfm1Regs_SDCMPL2 0x0000000F 0x0000
    R Sdfm1Regs_SDCPARM2 0x0000000F 0x039F
    R Sdfm1Regs_SDDATA2 0x0000000B 0x00000000
    R Sdfm1Regs_SDDATFIFO2 0x0000000B 0x00000000
    R Sdfm1Regs_SDCDATA2 0x0000000F 0x0000
    R Sdfm1Regs_SDCMPHZ2 0x0000000F 0x0000
    R Sdfm1Regs_SDFIFOCTL2 0x0000000F 0x0000
    R Sdfm1Regs_SDSYNC2 0x0000000F 0x0400
    R Sdfm1Regs_SDCTLPARM3 0x0000000F 0x0000
    R Sdfm1Regs_SDDFPARM3 0x0000000F 0x0F7F
    R Sdfm1Regs_SDDPARM3 0x0000000F 0x3800
    R Sdfm1Regs_SDCMPH3 0x0000000F 0x0000
    R Sdfm1Regs_SDCMPL3 0x0000000F 0x0000
    R Sdfm1Regs_SDCPARM3 0x0000000F 0x039F
    R Sdfm1Regs_SDDATA3 0x0000000B 0x00000000
    R Sdfm1Regs_SDDATFIFO3 0x0000000B 0x00000000
    R Sdfm1Regs_SDCDATA3 0x0000000F 0x0000
    R Sdfm1Regs_SDCMPHZ3 0x0000000F 0x0000
    R Sdfm1Regs_SDFIFOCTL3 0x0000000F 0x0000
    R Sdfm1Regs_SDSYNC3 0x0000000F 0x0400
    R Sdfm1Regs_SDCTLPARM4 0x0000000F 0x0000
    R Sdfm1Regs_SDDFPARM4 0x0000000F 0x0F7F
    R Sdfm1Regs_SDDPARM4 0x0000000F 0x3800
    R Sdfm1Regs_SDCMPH4 0x0000000F 0x0000
    R Sdfm1Regs_SDCMPL4 0x0000000F 0x0000
    R Sdfm1Regs_SDCPARM4 0x0000000F 0x039F
    R Sdfm1Regs_SDDATA4 0x0000000B 0x00000000
    R Sdfm1Regs_SDDATFIFO4 0x0000000B 0x00000000
    R Sdfm1Regs_SDCDATA4 0x0000000F 0x0000
    R Sdfm1Regs_SDCMPHZ4 0x0000000F 0x0000
    R Sdfm1Regs_SDFIFOCTL4 0x0000000F 0x0000
    R Sdfm1Regs_SDSYNC4 0x0000000F 0x0400

    Manoj Santha Mohan said:

    5) Are you running the example code as it provided in C2000Ware?

    Yes, it is the example from the C2000Ware (sdfm_ex1_filter_sync_cpuread) . 

    Thank you for your help. I hope it is just a simple problem. 

    Phillip 

  • 0 in reply to Phillip-jh
    TI__Guru 55700 points

    Phillip,

    Thanks for answering all the questions. Now, I have better clarity about this problem.

    Based on the SDIFLG register, it is clear that FILTER1 is generating data acknowledge event and FILTER2/3/4 are getting Modulator Clock failure. You get modulator clock failure on filter 2/3/4 because you don't provide clock to filter 2 / 3 / 4. This is expected. SDDATA1 register shows valid filter data 0xFFF1 for grounded analog input to SD-modulator.

    Since I see data acknowledge flag (AF1 set), I'm assuming sdfmDR1ISR interrupt service routine is indeed getting triggered and you are stuck in below while loop. Am I correct?

        while((HWREG(SDFM1_BASE + SDFM_O_SDIFLG) & 0xF000U) != 0xF000U)
        {
        }

    If so, this is because, the example code assume that clock and data and fed to all the four filter channels in SDFM. The while loop waits for all the filter channels to generate data acknowledge events. Since it received data acknowledge event only from FILTER1, it waits in an infinite loop.

    If you wish you work only with FILTER1, modify the code as shown below. This is allow the filter results to be populated in filter1Result buffer.

        while((HWREG(SDFM1_BASE + SDFM_O_SDIFLG) & 0xF000U) != 0x1000U)
        {
        }

    Regards,

    Manoj

  • 0 in reply to Manoj Santha Mohan
    Prodigy 100 points

    Hi Manoj, 

    Now is everything fine, thank you.

    Phillip