Due to the U.S. Thanksgiving holiday, please expect delayed responses during the week of 11/22.

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F280041C: Implementing live firmware update in TMS320F280041C

Part Number: TMS320F280041C
Other Parts Discussed in Thread: C2000WARE

Hi,

we are trying to implement live firmware update for TMS320F280041C but it has only one flash bank. Can you please suggest or provide example reference where one flash bank is used for

implementing live firmware update? 

Thanks and Regards,

Suhail.B

  • Suhail,

    We don't have a reference example for LFU with one flash bank.

    You would have to copy application code (part or whole - depending on which portion of the App will continue to run during LFU process) from Flash to RAM, so that the Flash APIs  can update Flash with the new application. The Flash APIs themselves would need to run from either ROM or RAM, not Flash. Flash APIs are in ROM for F28004x and F28002x. Your custom bootloader/Kernel would occupy a portion of Flash so that it can facilitate the switch between the images. You can split the rest of Flash in 2 portions, corresponding to 2 application versions.

    Thanks,

    Sira

  • Sira,

    Thanks for the reply. However i would like to know more about the changes you mentioned in your reply.

    1. When you say copy application code from Flash to RAM, do i need to make changes into command linker file? Let us assume whole part of application code to be copied to RAM from Flash. What changes do i need to do?

    2. For the suggestion "The Flash APIs themselves would need to run from either ROM"

    I could see "FLASH_API_ROM_RSVD : origin = 0x760, length = 0x000020     /* Required by Flash API from ROM */" in the cmd file of flashapi_ex2_sci_kernel project .  Does this mean the Flash APIs themselves are in ROM? or do we need to change anything?

    Below is what i am thinking please correct me if wrong:

    Since we have only Bank 0 in TMS320F280041C, first two sectors i.e sector 0 and sector 1 we will reserve for Sci kernel. the remaining sectors can we use just to update application image whenever we have LFU command? I mean to say overwriting the sectors 2-sectors 15 for LFU process.

    bank selection logic we will modify to always jump to Bank 0 code start address i.e 0x08EFF0 and in application code when LFU command is received we will always jump to Bank 0 DFU function i.e 0x81000. Will this changes work for LFU process?

    It would be of great help if you could let me know in little bit more details of what changes to be made and where exactly. May be you can let me know changes to be made for flashapi_ex2_sci_kernel and flashapi_ex3_live_firmware_update projects to make it work for single bank. I will modify it for my custom project as you will suggest.

    Thanks and Regards,

    Suhail.B

  • Sira,

    Any updates you have?

    Thanks,

    Suhail.B

  • Suhail,

    1. Yes, if you want to Load the code to Flash, but run from RAM, you would indicate so in the linker cmd file. There are many examples in C2000Ware that illustrate this.

    For example, 

    GROUP
    {
    isrcodefuncs
    } LOAD = FLASH_BANK0_SEC8_9_10,
    RUN = RAMLS1LS2,
    LOAD_START(isrcodefuncsLoadStart),
    LOAD_SIZE(isrcodefuncsLoadSize),
    LOAD_END(isrcodefuncsLoadEnd),
    RUN_START(isrcodefuncsRunStart),
    RUN_SIZE(isrcodefuncsRunSize),
    RUN_END(isrcodefuncsRunEnd),
    ALIGN(4)

    The above means there is a section isrcodefuncs which will be loaded to Flash and run from RAM. The linker will define the symbols like isrcodefuncsLoadStart etc. You can use "extern uint16 isrcodefuncsLoadStart" in your .h file, then in device_init(), you perform the memcpy from Flash to RAM (as shown in the statement below). If a specific ISR or function to be run from RAM, you can use #pragma CODE_SECTION(ISR1,"isrcodefuncs"); for that specific function or ISR (ISR1 in this case).

    memcpy(&isrcodefuncsRunStart, &isrcodefuncsLoadStart,
    (size_t)&isrcodefuncsLoadSize);

    2. If you look at Ex5, you will see it contains in main() a call to initFlashAPI() with the comment “initialize Flash API to ensure LFU command can write to Flash”. Ex5 also contains the associated Flash API library. So your App needs to include this library as well since the SCI Kernel will run only bankselect and pass control over to the App. C2000Ware contains a Flash API library in ROM (F28004x_FlashAPI_bootROMSymbols_fpu32_eabi.lib) that’s built for EABI. This can be included in your project. When using SCI Ex 2, use the corresponding ROM build configuration (BANK0_LDFU_ROM).

    Note that the bootloader kernel (i.e. Ex2) uses RAM and so you should make sure your App's RAM does not overlap and conflict with the bootloader's RAM.

    For the rest of the approach, I would prefer moving to email where I can give you pointed suggestions. Please add me as a contact and send me your email address.

    Thanks,

    Sira

  • Sira,

    Thanks for your reply. suhailpasha.b@ltts.com is my mail id. Please send out your suggestions ill try out and let you know the outcome.

    Thanks,

    Suhail.B


  • Sira,
    1. I could see in flashapi_ex2_sci_kernel project cmd file there is section of TI.ramfunc which is loaded from flash and run from ram below is the snippet of the same . Can you please shed some light on what does TI.ramfunc signifies in flashapi_ex2_sci_kernel project i mean to say what portion of kernel is running using TI.ramfunc?
       GROUP
       {
           .TI.ramfunc
       } LOAD = FLASH_BANK0_SEC0,
         RUN = RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3
         LOAD_START(_RamfuncsLoadStart),
         LOAD_SIZE(_RamfuncsLoadSize),
         LOAD_END(_RamfuncsLoadEnd),
         RUN_START(_RamfuncsRunStart),
         RUN_SIZE(_RamfuncsRunSize),
         RUN_END(_RamfuncsRunEnd),
         PAGE = 0, ALIGN(4)
    and also in application there is a section as well as below
       GROUP
       {
           .TI.ramfunc
       } LOAD = FLASH_BANK0_SEC15,
         RUN = RAMLS03,
         LOAD_START(_RamfuncsLoadStart),
         LOAD_SIZE(_RamfuncsLoadSize),
         LOAD_END(_RamfuncsLoadEnd),
         RUN_START(_RamfuncsRunStart),
         RUN_SIZE(_RamfuncsRunSize),
         RUN_END(_RamfuncsRunEnd),
         PAGE = 0, ALIGN(4)
    if suppose i want my entire application to be run from RAM am i suppose to add #pragma before main function starts  and use it in cmd file as above?

    2. As suggested, when i checked for BANK0_ROM build configuration in flashapi_ex3_live_firmware_update project i could see F021_ROM-API_F28004x_FPU32.lib being included in the build. Also, F021_ROM-API_F28004x_FPU32.lib gets included when i select BANK0_LDFU_ROM build configuration in flashapi_ex2_sci_kernel project. This means Fash API is run from ROM, Is my understanding correct just to use ROM config both for App and kernel?
    I tried below scenario but it dint work out:
    1. Made changes to 28004x_flash_api_liveFirmwareUpdate_bank0_lnk.cmd file not to overlap with SCI kernel RAM. I dint change anything in Kernel cmd file.    please find attached below 28004x_flash_api_liveFirmwareUpdate_bank0_lnk.cmd file changes done for your reference below.
    SECTIONS
    {
       codestart        : > BEGIN,     PAGE = 0, ALIGN(4)
       .text            : >>FLASH_BANK0_SEC8 | FLASH_BANK0_SEC9 | FLASH_BANK0_SEC10,   PAGE = 0, ALIGN(4)
       .cinit           : > FLASH_BANK0_SEC8,     PAGE = 0, ALIGN(4)
       .pinit           : > FLASH_BANK0_SEC8,     PAGE = 0, ALIGN(4)
       .switch          : > FLASH_BANK0_SEC8,     PAGE = 0, ALIGN(4)
       .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */
       /*.cio             : > RAMLS03,    PAGE = 0*/
       .cio             : > RAMLS4,    PAGE = 0
       /*.stack           : > RAMM1,     PAGE = 1*/
       .stack           : > RAMM0,     PAGE = 0
       .ebss            : > RAMLS6,    PAGE = 1
       .esysmem         : > RAMLS6,    PAGE = 1
       .econst          : > FLASH_BANK0_SEC11,    PAGE = 0, ALIGN(4)
      /* ramgs0           : > RAMGS0,    PAGE = 1
       ramgs1           : > RAMGS1,    PAGE = 1*/
       ramgs0           : > RAMGS2,    PAGE = 1
       ramgs1           : > RAMGS3,    PAGE = 1
       GROUP
       {
           .TI.ramfunc
       } LOAD = FLASH_BANK0_SEC8,
         /*RUN = RAMLS03,*/
         RUN = RAMLS4,
         LOAD_START(_RamfuncsLoadStart),
         LOAD_SIZE(_RamfuncsLoadSize),
         LOAD_END(_RamfuncsLoadEnd),
         RUN_START(_RamfuncsRunStart),
         RUN_SIZE(_RamfuncsRunSize),
         RUN_END(_RamfuncsRunEnd),
         PAGE = 0, ALIGN(4)
     
       /*DataBufferSection : > RAMM1, PAGE = 1, ALIGN(4)*/
       DataBufferSection : > RAMM0, PAGE = 0, ALIGN(4)
    }
    2. Changes made in function ldfuCopyData() of flashapi_ex2_ldfu.c to make sure kernel erases sectors 8- 15 and programs it with application image.                   flashed SCI kernel for BANK0_LDFU_ROM config and then using serial flash programmer i did LDFU for application using BANK0_ROM config, i was             able to do LFU but i got below error while running  the application. I Felt atleast for the very first time kernel should have been able to erase and program         the application and able to run but it dint work out.
    suhailpasha.b@ltts.com is my mail id, please suggest to proceed further
    Thanks and Regards,
    Suhail.B
  • Suhail,

    1. If you use .TI.ramfunc in the linker cmd file as you've shown, there are a few ways of running the code from RAM. In CCS Project settings - Advanced options - Runtime model options - --ramfunc = ON. This will place the entire App in RAM (provided space allows, otherwise it will generate an error on build) in .TI.ramfunc. You can also do this on a per file basis. Or you can do it on a per function basis, either using __attribute__((ramfunc)) in the line above the function, or #pragma CODE_SECTION(function_name, ".TI.ramfunc"); in the line above the function.

    2. Yes.

    For the LFU specific items, let us move to email, and I will close this thread.

    Thanks,

    Sira