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Original question:

TMS320F28388D: Hardware and PCB limitations on the possibilities to connect more MCUs by FSI , or by Ethernet interfaces...

TMS320F28388D: Possibilities to upgrade communication capabilities of ECS modules based on F28335 MCUs by FSI or Fast Ethernet interface impemented within accompaning PLD device...

Nenad Tezak
Intellectual 440 points
Part Number: TMS320F28388D
Other Parts Discussed in Thread: TMS320F28335, TIDM-02006

Dear Sir,

we have deployed by now a large number of ECS solutions based on the combination of the MCU (TMS320F28335) and PLD (Artix 7 series) devices, closely interconnected by synchronously operated communication bus, and by a quite a few discrete signal lines (to enhance flexibility and configurability of the ECS core module, as well as to extend the CPU capabilities of the MCU...). Since there are still some spare IO pins within the target system interface (considered so far as a special reserve), I kindly ask you to provide me information on the possibility to upgrade the previously described ECS core module by FSI compliant interface (operating at frequencies up to 50 MHz). Is it possible to implement more than one such FSI compliant interface (like few transmit and receive ports provided by F28388D MCUs)?

Best regards

Nenad

  • 0
    TI__Guru** 118000 points

    FSI peripherals are included in F28004x, F28002x, and F2838x series of devices.  It will be included in many future C2000 MCUs and in some TI Processors.

    F2838x has 8 Tx and 2 Rx channels.

    F28004x has 1 Tx and 1 Rx channel.

    F28002x has 1 Tx and 1 Rx channel.

    TIDM-02006 shows F2838x talking to multiple F28004x over FSI (this is being updated to show new F28002x as well)

    For processors/FPGA/PLDs that do not have FSI peripheral one option is to use an F28002x as a bridge.  F28002x includes a HIC peripheral. The Host Interface Controller (HIC) module allows an external host controller (master) to directly access resources of the device (slave) by emulating the ASRAM protocol. It has two modes of operation: direct access and mailbox access. In direct access mode, device resources is written to and read from directly by the external host. In mailbox access mode, external host and device write to and read from a buffer and notify each other when the buffer write/read is complete.

    So you could have processor/FPGA/PLD - HIC - F28002x - FSI TxRx - other FSI enabled devices.