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LAUNCHXL-F28379D: max. ADC input Voltage 3V or 3.3V ? Adjustable via Simulink?

Part Number: LAUNCHXL-F28379D

Hi,

i'm a beginner in microcontroller programming and i try to become familiar with the LAUNCHXL-F28379D -V2 .I want to use it for some kind of grid controlling.

I started programming with Matlab Simulink and tried to convert an analog signal (from a waveform generator) to a digital one.

It works but I noticed that the max. "readable" value with this programming is about 3V. In documents I found a value of 3.3V several times.

My questions are:

- Is the ADC's maximum "readable" voltage 3V or 3.3V - or is it adjustable?

- If it is 3.3V, how can i adjust this in Simulink setup?


Thanks a lot for your patience ;D

Best regards

Ben

  • Ben,

    Thanks for reaching out to the E2E forums.  The max voltage that the ADC on the F28379D can convert is determined by the input reference voltage supplied to the VREFHI pin(s) on the device.  In the case of the LAUNCHXL-F28379D we use a REF5030 to supply 3.0V(page 3 on the schematic).  

    The max allowable voltage on VREFHI is up to VDDA supply range, in this case on the launchpad this is 3.3V nominally.  So, you could replace the REF5030 with a 3.3V source(unfortunately there is not a native 3.3V REF, you'd have to pick 4V or greater then create a divider).  Or you could drive in 3.3V from an external source.

    One caution though, and why the launchpad is configured as such, the cap on VREFHI <=VDDA is one we try not to violate.  Likely there is some tolerance on the VDDA that will cause it to be slightly below(or above) 3.3V and would cause a violation of the above if we managed to get a stable 3.3V reference on this pin.

    If you do insert an off-board reference, I would insert it on the output pad of the REF5030 on the PCB(lifting the REF5030 pin), to take advantage of the downstream buffers prior to VREFHI already on the LP.  There's nothing you'll need to do in Simulink, its all based on VREFHI input.

    Best regards,
    Matthew

  • Hi Matthew,

     

    Many thanks for that detailed answer! I started immediately to study the schematic.

     

    I have a further question to the requirement "VREFHI <=VDDA" regarding to your hint:

    "If you do insert an off-board reference, I would insert it on the output pad of the REF5030 on the PCB(lifting the REF5030 pin)"

     

    If I use an off-board reference, how can i make sure that the requirement REFHI <= VDDA is not violated? Is it possible to rise the VDDA to (let us say) 3.4V from an external source?

    Best regards

    Ben

  • Ben,

    I read the DS a bit more closely(to make sure my answer was correct) and I think we are in better shape than my previous statement indicated if you want 3.3V on VREFHI.

    From the DS the actual restriction is:

    The VREFHI pin must be kept below VDDA + 0.3 V to ensure proper functional operation. If the VREFHI pin exceeds this level, a blocking circuit may activate, and the internal value of VREFHI may float to 0 V internally, giving improper ADC conversion or DAC output

    I looked at the LDO on the LP(That steps down the 5V to 3.3V) and it has a 3% tolerance, so the lowest it should be is 3.2V.  So no need to worry about violating the above with the LP powered normally.


    So we have 0.2V of margin(worst case) before we violate anything; so you are safe supplying 3.3V on VREFHI. 

    Best,

    Matthew

  • Thanks a lot for that detailed answer Matthew! This is verry helfpful.

    Ben