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TMS320F28027: Hazar and adventure in phase load and shaow register write

Part Number: TMS320F28027

Hi expert,

My customer is using F28027 and meets issue in below scenario.

1. External sync signal (10kHz to 200kHz) will trigger phase load to EPWM2 and EPWM3 to make TBCTR zero.

2. A timer ISR running at 80kHz will load CMPA and CMPB value to EPWM2 and EPWM3 (with shadow).

Risks here: If timer ISR conflicts with sync signal, EPWM2 and EPWM3 may not be updated simultaneously due to the possible conflit here.

Do you have any advice on how to over come this risk here?

Thanks

Sheldon

  • When are you shadow loading CMPA and CMPB?

    If you load them at TBCTR = "Period" then I think the Sync signal shouldn't ever cause one PWM to be updated without the other. I assume this to be true because PWM2 and PWM3 are likely updated at very close to the same time and the PWM period should be much longer than the time it takes to update both PWM's values. So when a sync signal comes in you should have plenty of tiem to finish writing the PWM values before TBCTR reaches TBPRD.

    Alternatively on newer devices like TMS320F28002x devices this is solved with the global load mechanism.

    Regards,
    Cody