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TMS320F280048C-Q1: High speed digital processing

Part Number: TMS320F280048C-Q1
Other Parts Discussed in Thread: ADS8900B, C2000WARE

Hi all,

   I am using ADS8900B ADC to digitize a high frequency signal (< 250 KHz) at the rate of 1MSPS (or 500 KSPS) throughput with F280048C. The 1 MSPS interrupt is generated from the CPUTimer0. The ADC data acquisition (generating CONVST, CS signal and reading data from SPI buffer after dummy write) itself is taking around 700ns. Whether this is a nominal value ?

  I need to implement 4th order Band Pass Filter in F280048C. Whether timing margins will be met given the fact that the DSC maximum clock freq is 100 MHz. Are there any optimized functions to do this ? The "IIR5BIQ32" for N=2 takes around 48 cycles and "IIR_f32_calc" takes around 90 cycles.

Thanks n Regards,

       Karthik R

  • Karthik,

    F280049 SPI Max SPI operating frequency is 25 MHz and has 16-level FIFO + DMA support to reduce CPU load. ADS8900B seems to support burst mode which should allow you to receive more than 1 ADC sample over SPI, you can configure SPI FIFO + DMA to achieve overall better transfer rate.

    Below examples SPI example available in C2000Ware should how to work with SPI / FIFO with DMA. These examples would be a good starting point to show how SPI FIFO + DMA is configured. You can adapt this example for your requirement.

    <C2000Ware>\driverlib\f28004x\examples\spi\spi_ex5_external_loopback_fifo_interrupts

    <C2000Ware>\driverlib\f28004x\examples\spi\spi_ex3_loopback_dma

    Regards,

    Manoj

  • Hi Manoj,

        Thanks for the reply. I was more worried with the processing capability of the DSC. Whether it can perform 4th order BPF at 1MHz.

       Thanks and Regards

           Karthik R

  • HI Karthik,

    The best level of optimisation you can get is using the IIR_f32_calc function. For a 4th order function, it should take around 90 cycles like you mentioned. You can get some extra speed (at the loss of some accuracy) using -fp_mode = relaxed in processor settings. Beyond this, there is no way to get the computation with lower clock cycles. Hope this helps.

    -Shantanu

  • Hi Shantanu,

        Thanks for the reply. I think I need to look into some other DSC.

       Thanks and Regards

            Karthik R