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C2000-DIGITAL-CONTROL-LIBRARY: Confusion about control algorithm in TI Example C2000 Digital Power Code

Part Number: C2000-DIGITAL-CONTROL-LIBRARY

Hi,

On page 35 of https://www.ti.com/lit/ug/tidueg2c/tidueg2c.pdf?ts=1616667110428&ref_url=https%253A%252F%252Fwww.google.com%252F, there is given a software routine that includes 3 interrupts. 

My question is quite simple - why does the solution.h file execute the first ISR twice? If run_ISR1 is dedicated to updating the PWM registers with new values, why is run_ISR1 then called again to perform a completely different function, i.e. to read the new ADC values etc?

Should that be the second ISR, i.e. run_ISR2? 

  • The second ISR is needed to disable the phase sync to the secondary side. This reduces jitter. When using high resolution mode the PWM sync pulses need to be minimized.

    Please see note on page 31

    "Each time ISR1 is enabled, it triggers two times. In the first ISR1, PWM registers are updated and a sync is enabled. In the second ISR1, the PWM sync is disabled and CMPC is set to a value such that ISR1 does not trigger again. For simplicity the software diagrams and structure only show ISR1 that is triggered the first time."