This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28065: ADC max clock frequency

Part Number: TMS320F28065

Team,

Table 7.13.1.1 of the datasheet SPRS698I says that the max ADC clock Freq is 45Mhz.

I assume that even if the TRM does not specify a max and suggest that high freq are possible, it is the datasheet that is providing a defiinitve answer for the max ADC clk freq that we specify for F2806x. The device must be used within the limits specified in the datasheet.

But trying to understand more on what is limiting the max ADC clock and what are the consequences:

-What are the factors that limits the max frequency?
-What kind of effect will be seen if we use the frequency above the max specified?
-What kind of effect will be seen if we use the frequency permanently above the max specified? Does it affects precision on the conversion? or will the ADC Fail to work properly?

I checked for Gen 3 devices and it seems that the max we specify for almost all the devices is 50 Mhz.

Thanks in advance!

A.

  • Hi AnBer,

    The max frequency is stated to be 45MHz, mainly limited by the ADC clock dividers (/2 or /4 of SYSCLK), the SYSCLK for this device is 90MHz so 90MHz/2 = 45MHz.

    We do not categorize the device past the max frequency provided by the datasheet. If the ADC frequency is outside the datasheet limits then we cannot guarantee that the other ADC specifications within the datasheet will be met.

    Best Regards,

    Marlyn