C2000 microcontrollers forum - Recent Threads

C2000WARE-DIGITALPOWER-SDK: Request for official TIDM-1022 source archive or supported handling of DigitalPower SDK 5.01.00.00 installer signature issue

Zhen Wang — Sun, 08 Nov 2026 04:57:51 GMT

Part Number: C2000WARE-DIGITALPOWER-SDK
Other Parts Discussed in Thread: TIDM-1022, , C2000WARE, SHA-256

Hello TI C2000 Support,

We need the complete official TIDM-1022 source project for software review and adaptation. Our installed DigitalPower SDK 26.01 does not contain solutions/tidm_1022, so we obtained the historical DigitalPower SDK 5.01.00.00 installer through the TI download process.

We are requesting either of the following official solutions:

Provide the supported handling method for the historical Windows installer’s signature-validation issue, without disabling security protection, changing the system date, importing unknown certificates, or bypassing signature verification.
Provide an official, statically accessible TIDM-1022 source archive, including its license, dependency versions, complete project configuration, linker files, required libraries, and build instructions. Normal TI licensing and export-approval requirements should remain applicable.

Installer and checksum

Official historical download page:
https://www.ti.com/tool/download/C2000WARE-DIGITALPOWER-SDK/5.01.00.00

Filename:
C2000Ware_DigitalPower_SDK_5_01_00_00_setup.exe

File size:
500,208,600 bytes

SHA-256:

df5cc461ddbc868d5d2a2e3b0aa30e33c79c0316ce9ac6d5228578976d220bb9

This matches the checksum published in the official TI download page and our local file.

Signature-validation results

Windows Get-AuthenticodeSignature returns:

Status: UnknownError

A required certificate is not within its validity period when verifying
against the current system clock or the timestamp in the signed file.

Signer: Texas Instruments, Inc.

Signing-certificate thumbprint:

969595CE7D915766D67BDC0D231D3126C35EB87A

Certificate validity:

2021-11-09 00:00:00 UTC
through
2024-11-08 23:59:59 UTC

The certificate chain builds through:

Texas Instruments, Inc.
→ DigiCert Trusted G4 Code Signing RSA4096 SHA384 2021 CA1
→ DigiCert Trusted Root G4

At the current system date of November 7, 2026, native Windows/.NET chain verification reports NotTimeValid for the signing certificate. The native retry did not report additional chain errors.

We inspected both the outer SHA-1 signature and the nested SHA-256 signature. Neither contained a countersignature or RFC 3161 timestamp-token attribute. Their signed signingTime attributes indicate:

2023-12-14 19:24:56 UTC
2023-12-14 19:25:06 UTC

We understand that these signer-declared times are not equivalent to a trusted timestamp.

SignTool was not found in PATH or the normal Windows SDK locations, so we have not claimed a successful signtool verify /pa /all /v result.

Microsoft Defender completed a targeted scan and reported no threats. We are not treating either the matching checksum or the antivirus result as a substitute for signature validation.

Static extraction attempt

Without executing the installer, we tried existing local archive tools.

7-Zip 26.03 can read the outer PE structure and extract an appended data region, but cannot open that region as an archive. Windows tar and MSYS bsdtar also report “Unrecognized archive format.” The data footer contains bitrock-lzma-4.0.

We have not executed the installer, run any program from the package, or loaded its extraction components.

Could TI please confirm the expected signature/timestamp status of this exact historical installer and provide one of the two supported solutions requested above?

For the source-archive option, we specifically need the actual control sources and dependencies required to trace the interleaved operation, valley-detection path, variable-period PWM updates, and CPU/CLA implementation—not only documentation or prebuilt binaries.

We will keep the installer unexecuted pending an official resolution.

Thank you.

F29H850TU: Getting started with XF29H850TU9SPTS || Railway TCAS application

B B — Sun, 08 Nov 2026 02:47:52 GMT

Part Number: F29H850TU

1.Is there any video tutorial series either of TI or any other to getting started with XF29H850TU9SPTS ?
F29H850TU | Buy TI Parts | TI.com

2. If video tutorial series is not there, plz help to advise getting started guide for this

TMS320F2800132: TMS320F2800132 - Error -1156 "Trouble Halting Target CPU" on one laptop only

Chiranjeev Sirola — Fri, 06 Nov 2026 17:11:27 GMT

Part Number: TMS320F2800132
Other Parts Discussed in Thread: UNIFLASH

Hi Experts,

I am working with a custom board based on TMS320F2800132.

I can successfully connect to the target and start a debug session from one laptop (Laptop A), but I am unable to do so from another laptop (Laptop B). Both laptops have the same development environment:

CCS Version: 12.3
Same target configuration
Same XDS debugger
Same project/workspace

On Laptop B, the following error appears when I start a debug session:

Trouble Halting Target CPU: (Error -1156 @ 0x0)
Device may be operating in low-power mode.
Do you want to bring it out of this mode?
Choose 'Yes' to force the device to wake up and retry the operation.
Choose 'No' to retry the operation without waking the device.
(Emulation package 9.11.0.00128)

Regardless of whether I select Yes or No, the same message appears repeatedly and the debug session does not start.

Since the setup works correctly on Laptop A with the same hardware and software versions, the issue appears to be specific to Laptop B.

I would prefer not to migrate to a newer CCS version because the legacy code was developed and validated using CCS 12.3, and upgrading may introduce compatibility issues.

Could you please suggest what could cause this behavior and what additional checks I should perform on Laptop B?

Thanks in advance.

TMS320F28379D: Microcontroller Failures During First Power-Up

Zachary Acosta — Fri, 06 Nov 2026 15:27:32 GMT

Part Number: TMS320F28379D
Other Parts Discussed in Thread: TMS320F28377D, TPS62420, TPS3702

Hello there,

I am currently using the 176-Pin TMS320F28377D in a design and have been experiencing catastrophic microcontroller failures during power-up of the circuit card assembly. These failures occur intermittently, about one-third of the time.

I suspect that it may be related to the power supply topology I am using for VDDIO and VDD. My current configuration uses a cascading power architecture, where a 3.3 V buck regulator (VDDIO) feeds a second 1.2 V buck regulator (VDD). Because of this arrangement, there is a delay between the power-up of the two supply rails, ~2ms. The microcontroller is held in reset until the PGood of the regulators is high.

I am meeting the power sequencing requirements outlined in Section 6.9.1.2 and ensuring that VDD does not exceed VDDIO by more than 0.3 V. However, VDDOSC and VDD are not powering up at the same time.

Could this delay in the power sequencing, or the fact that VDDOSC and VDD are not powering up simultaneously, be contributing to the intermittent failures? I've attached a couple of rise time capture between the 3.3 V and 1.2 V regulators. I would appreciate any insight into whether my current power topology or sequencing approach could be causing this issue.

TMS320F28377D: sources and documentation for rts2800_fpu32.lib

bessiere sylvain — Fri, 06 Nov 2026 14:24:39 GMT

Part Number: TMS320F28377D

Hello,

I'm an aeronautic engineer and in order to certify my code with DO178-C norm, I have to retrieve the source code of the library rts2800_fpu32.lib in order to perform the required verification activities. Is it possible to retrieve the source code under NDA or to purchase it ?

best regards,

Sylvain

F29H850TU: F29H850TU: MCAN remains in INIT after CPU halt and resume during CCS debugging

Ren Nakanishi — Fri, 06 Nov 2026 04:28:16 GMT

Part Number: F29H850TU
Other Parts Discussed in Thread: LAUNCHXL-F29H85X,

Hi,

We are using MCAN on the LAUNCHXL-F29H85X. MCAN communication works normally, but it does not resume after the CPU is halted and then resumed during a CCS debug session.

The issue occurs in both cases:

The CPU is halted at a breakpoint and then resumed.
The CPU is manually suspended using the Suspend button in CCS and then resumed.

While the CPU is halted, the following MCAN_CCCR bits are set to 1:

CSR
CSA
INIT

After CPU execution is resumed, CSR and CSA return to 0, but INIT remains set to 1. As a result, MCAN communication does not resume.

Environment:

Evaluation board: LAUNCHXL-F29H85X
Device: F29H850TU
SDK: F29H85x SDK 1.02.01.00
CCS version: 21.0.0
Debug probe: On-board XDS110

Could you please clarify the expected behavior?

Is it expected that MCAN enters the Clock Stop state and sets INIT when the CPU is halted during debugging?
After the CPU is resumed, should MCAN automatically clear INIT and resume communication?
If INIT is expected to remain set, what is the TI-recommended way to continue debugging? Should MCAN or CCS be configured to prevent this behavior, or is another recovery procedure expected?
Is this behavior documented in the TRM, SDK documentation, CCS documentation, or device errata?

Best regards,

F29H859TU-Q1: Is there a way to do some checks in the linker script and to report an error is any ?

Ronan DANIOUX — Thu, 05 Nov 2026 18:44:46 GMT

Part Number: F29H859TU-Q1
Other Parts Discussed in Thread: SYSCONFIG

Hello,

I would like to add some tests in the linker script like checking if the size of a memory is a multiple of 4096, if its start address is also a multiple of 4096... and report an error if a test failed (something like an assert).

Is this possible ? If yes, what are the possible solutions ?

Thank you

F29H859TU-Q1: The order of sections does not seem to be guaranteed with the option --honor_cmdfile_order

Ronan DANIOUX — Thu, 05 Nov 2026 16:20:35 GMT

Part Number: F29H859TU-Q1

Hello,

The order of output sections does not seem to fully follow the order specified in the linker script when the option --honor_cmdfile_order is used.

Here is a summary showing a simplified linker scripts (only the output sections) and for each output section, how it has been mapped in MEMORY, and the order in the MEMORY:

SECTIONS
{
codestart : {} > 0x10001000, palign(8) => [0x10001000..0x10001020[ {FLASH_RP0.1}
.text.cpu1 : {} > FLASH_RP0, palign(4096) => [0x10002000..0x10027000[ {FLASH_RP0.8}
.rodata.cpu1 : {} > FLASH_RP0, palign(4096) => [0x10027000..0x10029000[ {FLASH_RP0.9}
.text.cpu1.link3 : {} > FLASH_RP0_LINK3, palign(4096) => [0x100e0000..0x100e0000[ {FLASH_RP0_LINK3.1}
.text.cpu1.link4 : {} > FLASH_RP0_LINK4, palign(4096) => [0x100f0000..0x100f0000[ {FLASH_RP0_LINK3.1}

.text.cpu1.ram : {} LOAD=FLASH_RP0, RUN=SRAM_LPAx, table(.copy_table), palign(8) => [0x10029000..0x1002e840[ {FLASH_RP0.10} -- [0x20100000..0x20105840[ {SRAM_LPAx.1}

.text.global.ram : {} LOAD=FLASH_RP0, RUN=SRAM_CPAx, table(.copy_table), palign(8) => [0x1002e840..0x10035de0[ {FLASH_RP0.11} -- [0x20110000..0x201175a0[ {SRAM_CPAx.1}

.stack : {} > SRAM_LDA7 => [0x200e0000..0x200e2000[ {SRAM_LDA7.1}
.TI.noinit : {} > RESET_RAM => --
.data.cpu1 : {} LOAD=FLASH_RP0, RUN=SRAM_LDAx, table(.copy_table), palign(8) => [0x10001020..0x10001108[ {FLASH_RP0.2} -- [0x200e4000..0x200e40e8[ {SRAM_LDAx.1}
.bss.cpu1 : {} RUN=SRAM_LDAx, table(.clear_table) => [0x200e40e8..0x200ee774[ {SRAM_LDAx.2}
.rodata.cpu1.ram : {} LOAD=FLASH_RP0, RUN=SRAM_LDAx, table(.copy_table), palign(8) => [0x10001108..0x10001138[ {FLASH_RP0.3} -- [0x200ee778..0x200ee7a8[ {SRAM_LDAx.3}

.calib : {} LOAD=FLASH_CALIB, RUN=SRAM_CALIB, table(.copy_table), palign(8) => [0x101fc010..0x101ff1e8[ {FLASH_CALIB.1} -- [0x2014c010..0x2014f1e8[ {SRAM_CALIB.1}

.data.global : {} LOAD=FLASH_RP0, RUN=SRAM_CDAx, table(.copy_table), palign(8) => [0x10001138..0x10001178[ {FLASH_RP0.4} -- [0x20128000..0x20128040[ {SRAM_CDAx.1}
.bss.global : {} RUN=SRAM_CDAx, table(.clear_table) => [0x20128040..0x20128074[ {SRAM_CDAx.2}
.data.cpu1.link3 : {} LOAD=FLASH_RP0, RUN=SRAM_CDA0_LNK3, table(.copy_table), palign(8) => --
.bss.cpu1.link3 : {} RUN=SRAM_CDA0_LNK3, table(.clear_table) => --
.data.cpu1.link4 : {} LOAD=FLASH_RP0, RUN=SRAM_CDA1_LNK4, table(.copy_table), palign(8) => --
.bss.cpu1.link4 : {} RUN=SRAM_CDA1_LNK4, table(.clear_table) => --
.rodata.global.ram : {} LOAD=FLASH_RP0, RUN=SRAM_CDA10_CST, table(.copy_table), palign(8) => [0x10001178..0x10001260[ {FLASH_RP0.5} -- [0x20148000..0x201480e8[ {SRAM_CDA10_CST.1}

.copy_table : {*(*.copy_table)} > FLASH_RP0 => [0x10001260..0x100012b8[ {FLASH_RP0.6}
.clear_table : {*(*.clear_table)} > FLASH_RP0 => [0x100012b8..0x100012d4[ {FLASH_RP0.7}
}

For the addresses in RAM, the order is repected.

For the constants and functions in flash (except the copy/clear tables), the order is respected.

However:

For the LOAD values, they are allocated before .text.cpu1. Why ?
And the copy/clear tables, which are mapped in flash, the order is not respected because they are also allocated before .text.cpu1. Why ?

And how to prevent that (and using GROUP is not an option for different reasons) ?

Thank you

TMS320F2800137: Why I can not download C2000WARE?

lin lin — Thu, 05 Nov 2026 09:24:04 GMT

Part Number: TMS320F2800137
Other Parts Discussed in Thread: C2000WARE

Why I can not download C2000WARE?

TMS320F28388D: How to setup InitAuxPll for EtherCAT and USB at the same time ?

Duy BUI — Thu, 05 Nov 2026 07:48:36 GMT

Part Number: TMS320F28388D

Hello,

For EtherCAT I need to setup the Aux clock to 500MHz

And for USB I need to setup the Aux clock to 60MHz

So how to setup the InitAuxPll to use both EtherCAT and USB ?

XDS110ISO-EVM: Failure of XDS110

Abhilash K — Thu, 05 Nov 2026 07:35:31 GMT

Part Number: XDS110ISO-EVM

We have 2 TMDSEMU110-U — XDS110 JTAG Debug Probe and which is failed to program.

TIDM-BUCKBOOST-BIDIR: Technical Clarifications and Hardware Availability – TIDM-BUCKBOOST-BIDIR Reference Design

Vedhesh Hari U — Thu, 05 Nov 2026 05:46:28 GMT

Part Number: TIDM-BUCKBOOST-BIDIR
Other Parts Discussed in Thread: TMS320F28035

We are developing an automotive DC–DC converter to power a separate ADAS SoC board, with the following requirements:

Input voltage: 8–36 V DC
Output voltage: 12 V nominal, programmable
Maximum output power: 50 W
Topology: Four-switch synchronous, non-isolated buck–boost
Operating mode: CCM

We identified the TIDM-BUCKBOOST-BIDIR reference design, based on the TMS320F28035 C2000 controller, as a potential platform for our project.

We would appreciate your help with the following:

Could you share the secondary board schematics and complete hardware documentation, as these do not appear to be available among the files on the TI website?
Is the actual reference board available for purchase or through any other arrangement?
If available, could we obtain the board for hands-on testing, evaluation, and development?

We intend to use this reference design to study the digital control implementation and evaluate its suitability for adaptation to our project requirements.

Any guidance regarding hardware availability and additional design resources would be greatly appreciated.

TMS320F280025-Q1: TMS320F280025-Q1 OTP Flashing issue

Yelena Mao — Thu, 05 Nov 2026 05:40:12 GMT

Part Number: TMS320F280025-Q1
Other Parts Discussed in Thread: TMS320F280025

The programmer supports flashing the TMS320F280025. It uses SCI interface boot mode to download the code, and calls API functions to erase and program the chip.

Currently, there is an issue where the fixed OTP address 0x78018 cannot be programmed.

In the older version of the datasheet/reference manual, this address was marked as "Reserved".

In the new version of the manual, this address has been changed to Z1OTP_JTAGLOCK.

Previously, we always skipped programming this address and left it unhandled. However, the new file provided by the customer requires this address to be programmed with the value 0xF0.

The programming API function returns an error, and this address cannot be programmed correctly. I have tried modifying the 64-bit and 128-bit settings, and also changed Fapi_AutoEccGeneration to Fapi_DataOnly, but neither change had any effect.

TIDM-BUCKBOOST-BIDIR: Request for Secondary Board Schematics and Hardware Availability – TIDM-BUCKBOOST-BIDIR

Vedhesh Hari U — Thu, 05 Nov 2026 04:47:32 GMT

Part Number: TIDM-BUCKBOOST-BIDIR
Other Parts Discussed in Thread: TMS320F28035

We are developing an automotive DC–DC converter to power a separate ADAS SoC board, with the following requirements:

Input voltage: 8–36 V DC
Output voltage: 12 V nominal, programmable
Maximum output power: 50 W
Topology: Four-switch synchronous, non-isolated buck–boost
Operating mode: CCM
Digital controller: Preferably TI C2000 family

We identified the TIDM-BUCKBOOST-BIDIR reference design, based on the TMS320F28035 C2000 controller, as a potential platform for our project.

We would appreciate your help with the following:

Could you share the secondary board schematics and complete hardware documentation, as these do not appear to be available among the files on the TI website?
Is the actual reference board available for purchase or through any other arrangement?
If available, could we obtain the board for hands-on testing, evaluation, and development?

We intend to use this reference design to study the digital control implementation and evaluate its suitability for adaptation to our project requirements.

Any guidance regarding hardware availability and additional design resources would be greatly appreciated.

Thank you.

TMS320F28P650DH: ADC repeater by SOCx and how it works with the round-robin

Hang Yang — Thu, 05 Nov 2026 03:12:04 GMT

Part Number: TMS320F28P650DH
Other Parts Discussed in Thread: SYSCONFIG

Hi Experts,

When using the ADC repeater module for oversampling? Can we repeat sepcific SOCx individually?

For esample, ePWM SOCA at ePWM ZERO event should trigger SOC1,2,3,4,5, can we repeat SOC1 only for 3 times, like:

CTR=ZERO->1->1->1->2->3->4->5?

If not, is there any work around to achieve this sequence?

One possible way is to bind the channel that needs oversampling to SOCB, If I set up SOCB to trigger SOC1 for three times, and SOCA trigger SOC2,3,4,5, and both SOCA and SOCB are bind to the ZERO event, which sequence would happens in the following two?

ZERO ->1->1->1->2->3->4->5

ZERO ->1->2->3->4->5->1->1

In the meantime, is there other materials that we can learn about this module other than TRM? The TRM do not include having the repeater works with other non-repeated SOCs.

Regards,

Hang

F29H850TU: CLB Data exchange registers being DMA accessible

Ilan Messing — Wed, 04 Nov 2026 22:25:41 GMT

Part Number: F29H850TU

On most C28x based MCUs i've checked the CLB registers are not reachable with DMA and there is effecrively no way to move data to/from the CLB without CPU or CLA intervention.

In the Table 7-28 of the f29h859tu datasheet it says they are DMA reachable.

Can this be confirmed?

Thank you.

TMS320F28379D: F2837xD: CPU2 flash load does not restore GS RAM: 0xD000–0xD04F is never backed up, and 0xC126–0xC143 / 0xC859–0xC876 are restored with verifyw.alg code

Nehemiae George Roy — Wed, 04 Nov 2026 17:53:22 GMT

Part Number: TMS320F28379D
Other Parts Discussed in Thread: LAUNCHXL-F28379D

trace_error1_gs1_gap.txt trace_error2_gs0_windows.txt trace_test_setup_cpu1.txt readback_after_load.txt

Description

Summary

When the CCS flash plugin programs the CPU2 flash of an F2837xD (load through DSS), it uses GS0/GS1 for its algorithms and its data buffer. It backs up that RAM before and restores it afterwards ("Enable Flash RAM Backup", backup type 1), but two areas do not get their original content back:

GS1, 0xD000–0xD04F (80 words) is never backed up. The data-buffer backup reads from 0xD050 (length 0x1FB0), while the image data is written to the buffer from 0xD000. After the load, these 80 words hold image data.
GS0, 0xC126–0xC143 and 0xC859–0xC876 (30 words each) are restored with flash-algorithm code. In the second program/verify pass, the .cinit + ramfuncs backups for progw.alg and pwrite_en.alg are taken while verifyw.alg code is in RAM. The final restore writes the good 0xC000–0xC961 backup first and these four small backups after it, so the windows keep verifyw.alg code.

Debugger resets of CPU1 or CPU2 do not clear these areas. An application that keeps data in GS RAM across a CPU2 reflash, or reads a shared buffer before it is first written, sees this content. We hit it with a dual-core motor-control application whose CPU2 → CPU1 data buffer is at 0xD000: CPU1's first read returned image data (5.55e12, −9.07e37 as float32) and the motor stalled.

Environment

Item	Value
Device	TMS320F28379D; registers read on this chip: REVID = 0x3, PARTIDH = 0x00F90300, PARTIDL = 0x10077F80
Board / probe	LAUNCHXL-F28379D Rev 2.0, on-board XDS100v2
CCS	20.5.0.00028; also reproduced with 12.7.0.00007 and 10.0.0.00010, each with the DSS of that install
Flash plugin	`ccs_base/DebugServer/bin/FlashC2000F021.dll`, algorithms `c2000/nowFlash/libraries/F2837xD_f021_c28x.nfl`; trace: `DLL name = FlashC2000F021`, `m_iBackupType = 1`
Target configuration	F28379D ccxml for the XDS100v2, with the standard GEL files `f28377d_cpu1.gel` / `f28377d_cpu2.gel`
Load	DSS `loadProgram()` on C28xx_CPU2 (scripted; not tried from the CCS IDE)

Steps to reproduce (pattern test, no application running)

Connect CPU1 and CPU2 (the GEL OnTargetConnect initializes the RAM).
From CPU1 (GSxMSEL = 0, CPU1 is master of all GS blocks), fill GS0–GS2 (0xC000–0xEFFF) with 0xA5A5 and read it back (all 0xA5A5).
Load any CPU2 flash image with loadProgram() on CPU2 (we used a small image with no I/O).
Before running any core, read GS0–GS2 again from CPU1.
Optional: reset CPU2, then CPU1, from the debugger, and read again.

Expected: GS0–GS2 are all 0xA5A5 again; the flash plugin restores the RAM it used (GSxMSEL is restored to 0x0).

Actual:

Snapshot	GS0	GS1	GS2	GSxMSEL
Before the load	all 0xA5A5	all 0xA5A5	all 0xA5A5	0x0
After the load	not 0xA5A5: 0xC126–0xC143, 0xC859–0xC876	not 0xA5A5: 0xD000–0xD04F	all 0xA5A5	0x0
After a CPU2 reset	same ranges, same content	same range, same content	all 0xA5A5	0x0
After a CPU1 reset	same ranges, same content	same range, same content	all 0xA5A5	0x0

The restored words in the GS0 windows equal the verifyw.alg words at the same addresses (60 of 60 words). Same result in CCS 12.7 and 20.5 (identical F2837xD_f021_c28x.nfl). With CCS 10.0 the GS0 windows are at 0xC0F2–0xC10F and 0xC64F–0xC66C (different algorithm build); the GS1 gap is the same, 0xD000–0xD04F.

Readback after the load (CCS 20.5, attachment readback_after_load.txt):

GS1, 0xD000-0xD05F (0xD000-0xD04F = image data, 0xD050 on = pattern, restored):
0xd000 02ec 0008 02f6 0008 0300 0008 030a 0008
0xd008 0314 0008 031e 0008 0328 0008 0332 0008
0xd010 033c 0008 0346 0008 0350 0008 035a 0008
0xd018 0364 0008 036e 0008 0378 0008 0382 0008
0xd020 038c 0008 0396 0008 03a0 0008 03aa 0008
0xd028 03b4 0008 03be 0008 03c8 0008 03d2 0008
0xd030 03dc 0008 03e6 0008 03f0 0008 03fa 0008
0xd038 0404 0008 040e 0008 0418 0008 0422 0008
0xd040 042c 0008 05a8 0008 05a8 0008 0436 0008
0xd048 0440 0008 044a 0008 05a8 0008 05a8 0008
0xd050 a5a5 a5a5 a5a5 a5a5 a5a5 a5a5 a5a5 a5a5
0xd058 a5a5 a5a5 a5a5 a5a5 a5a5 a5a5 a5a5 a5a5

GS0, window 1 (0xC126-0xC143) and window 2 (0xC859-0xC876); the rest of GS0 is pattern:
0xc120 a5a5 a5a5 a5a5 a5a5 a5a5 a5a5 ec05 28e2
0xc128 01f6 ffef 01d9 761f 0005 8a08 18d4 fffd
0xc130 8a08 9a00 9001 dc02 cdc4 fffe caa8 96c4
0xc138 8f00 0144 0608 5601 00a4 ccc4 fff8 5005
0xc140 96c4 d008 0692 d02a a5a5 a5a5 a5a5 a5a5
0xc850 a5a5 a5a5 a5a5 a5a5 a5a5 a5a5 a5a5 a5a5
0xc858 a5a5 aaa9 7640 c8fa 88a9 8f00 01f4 a8a9
0xc860 0fa6 6014 0200 761f 0004 8f00 0122 1e30
0xc868 064a 1ec4 0648 1ed4 0646 1ee4 0644 1ef4
0xc870 6f05 0204 761f 0004 1e30 fe8a 86be a5a5

Analysis from the debug-server trace

Logging: TI_DS_ENABLE_LOGGING=1, TI_DS_LOGGING_OUTPUT=<file> (CCS 20.5, one CPU2 flash load, 166 MB). Fields of the GTI_READMEM_BLK / GTI_WRITEMEM_BLK lines: handle, address, page (1 = data, 0 = program), length in words. GTI C: is the call and GTI R: the return; on a READ, the value on the call line is the host buffer before the read, so the value actually read is on the return line. The number before each line is its line number in the log file.

Error 1, GS1 gap (Appendix A):

line 600412: backup of the data buffer, READMEM 0xD050 len 0x1FB0 (0xD050–0xEFFF);
lines 674618 and 785634: image data written to 0xD000 (len 0x1000, then 0x13A), so 0xD000–0xD04F is overwritten;
line 852013: restore WRITEMEM 0xD050 len 0x1FB0. Nothing writes 0xD000–0xD04F back.

Error 2, GS0 windows (Appendix B). The plugin makes 8 algorithm loads of 6 algorithms: wr_pll, erasew, then progw + verifyw for each chunk of image data (2 chunks here), then pwrite_en, pwrite_dis.

For the first chunk, before each algorithm load the plugin writes the previous backup back (e.g. line 712896, WRITEMEM 0xC000 len 0x859 = 0xA5A5), backs up again (line 740141, READMEM 0xC000 len 0x962 returns 0xA5A5: good) and loads the algorithm.
For the second chunk, the write-back is skipped. progw.alg is loaded over verifyw.alg: its ramfuncs and .cinit backups (lines 766450 0xC873 len 4, 783943 0xC859 len 0x1A) return verifyw.alg code (0x0004, 0xAAA9). After the second verifyw.alg load (line 789353), pwrite_en.alg is loaded the same way and its backups (lines 818249 0xC140 len 4, 820998 0xC126 len 0x1A) return verifyw.alg code too (0x96C4, 0xEC05). The .text writes at 0xC000 get no new backup (that start address is already saved).
RestoreBackedUpRAM() (line 830937) writes the backups in ascending start-address order: 0xC000 len 0x962 (good, lines 831398/850620), then 0xC126, 0xC140, 0xC859, 0xC873 with exactly the words read above (lines 850931–851491), then 0xC962, 0xC97C, 0xD050. The four small backups lie inside 0xC000–0xC961 and overwrite the good data. (Derived from the trace, not tested: restoring the 0xC000 block last, or not re-backing-up ranges inside an existing backup, would give the original data back.)

The GS RAM read/write/backup/restore sequence of the flash operation is identical in CCS 12.7 and 20.5 (126 events).

Questions

Is the 0x50-word offset of the data-buffer backup (0xD050 instead of 0xD000) intended? If yes, what is kept in 0xD000–0xD04F, and should applications avoid it?
Can the restore be fixed so that GS0/GS1 come back unchanged after a CPU2 flash load (both defects)? Which CCS release would get the fix?
Until then, which RAM ranges on F2837xD should applications treat as overwritten by a CPU2 flash load? Is there a recommended setting or GEL step to restore or clear them?

Attachments

trace_error1_gs1_gap.txt: complete trace lines for error 1 (CCS 20.5).
trace_error2_gs0_windows.txt: complete trace lines for error 2 (CCS 20.5).
trace_test_setup_cpu1.txt: the pattern fill and readback from CPU1 before the load.
readback_after_load.txt: GS0/GS1 rows after the load.
Available on request: the full 166 MB log, and the logs for CCS 12.7 and 10.0.

Appendix A: Error 1 (GS1 gap), complete trace lines

46598: 0x00007610 8866 3 C28xx_CPU2 FLASH R: FlashOperations::MatchFlashDLL() = true, DLL name = FlashC2000F021, m_bNeedsFlashProperties = true, m_bNeedsFlashUtility = true, m_iBackupType = 1
555463: 0x00007610 68787 3 C28xx_CPU2 FLASH C: FlashProgrammerUtility::WriteAlgorithmToMemory( wr_pll.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ )
564426: 0x00007610 69497 3 C28xx_CPU2 FLASH R: FlashProgrammerUtility::WriteAlgorithmToMemory( wr_pll.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ ) = (null)
566563: 0x00007610 69803 3 C28xx_CPU2 FLASH C: FlashProgrammerUtility::WriteAlgorithmToMemory( erasew.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ )
594653: 0x00007610 72561 3 C28xx_CPU2 FLASH R: FlashProgrammerUtility::WriteAlgorithmToMemory( erasew.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ ) = (null)
596927: 0x00007610 72996 3 C28xx_CPU2 FLASH C: FlashProgrammerUtility::WriteAlgorithmToMemory( progw.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ )
600412: 0x0000CBF8 73054 3 C28xx_CPU2 GTI C: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000D050, 0x00000001, 0x00001FB0, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x00000302 )
632866: 0x0000CBF8 76500 3 C28xx_CPU2 GTI R: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000D050, 0x00000001, 0x00001FB0, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000A5A5 ) = 0x00000000
673439: 0x00007610 80437 3 C28xx_CPU2 FLASH R: FlashProgrammerUtility::WriteAlgorithmToMemory( progw.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ ) = (null)
674618: 0x0000CBF8 80540 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000D000, 0x00000000, 0x00001000, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x00000048 )
707398: 0x0000CBF8 83484 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000D000, 0x00000000, 0x00001000, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0F300048 ) = 0x00000000
708739: 0x00007610 83655 3 C28xx_CPU2 FLASH C: FlashProgrammerUtility::WriteAlgorithmToMemory( verifyw.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ )
760138: 0x00007610 88569 3 C28xx_CPU2 FLASH R: FlashProgrammerUtility::WriteAlgorithmToMemory( verifyw.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ ) = (null)
762824: 0x00007610 88885 3 C28xx_CPU2 FLASH C: FlashProgrammerUtility::WriteAlgorithmToMemory( progw.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ )
784441: 0x00007610 90694 3 C28xx_CPU2 FLASH R: FlashProgrammerUtility::WriteAlgorithmToMemory( progw.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ ) = (null)
785634: 0x0000CBF8 90803 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000D000, 0x00000000, 0x0000013A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x000002EC )
788158: 0x0000CBF8 91034 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000D000, 0x00000000, 0x0000013A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x000802EC ) = 0x00000000
789353: 0x00007610 91146 3 C28xx_CPU2 FLASH C: FlashProgrammerUtility::WriteAlgorithmToMemory( verifyw.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ )
813257: 0x00007610 93225 3 C28xx_CPU2 FLASH R: FlashProgrammerUtility::WriteAlgorithmToMemory( verifyw.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ ) = (null)
815679: 0x00007610 93474 3 C28xx_CPU2 FLASH C: FlashProgrammerUtility::WriteAlgorithmToMemory( pwrite_en.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ )
821496: 0x00007610 94455 3 C28xx_CPU2 FLASH R: FlashProgrammerUtility::WriteAlgorithmToMemory( pwrite_en.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ ) = (null)
824200: 0x00007610 94723 3 C28xx_CPU2 FLASH C: FlashProgrammerUtility::WriteAlgorithmToMemory( pwrite_dis.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ )
829791: 0x00007610 95098 3 C28xx_CPU2 FLASH R: FlashProgrammerUtility::WriteAlgorithmToMemory( pwrite_dis.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ ) = (null)
830937: 0x00007610 95215 3 C28xx_CPU2 FLASH C: FlashProgrammerUtility::RestoreBackedUpRAM()
852013: 0x0000CBF8 97213 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000D050, 0x00000001, 0x00001FB0, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000A5A5 )
916915: 0x0000CBF8 103389 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000D050, 0x00000001, 0x00001FB0, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0xA5A5A5A5 ) = 0x00000000
916929: 0x00007610 103390 3 C28xx_CPU2 FLASH R: FlashProgrammerUtility::RestoreBackedUpRAM()

Appendix B: Error 2 (GS0 windows), complete trace lines

46598: 0x00007610 8866 3 C28xx_CPU2 FLASH R: FlashOperations::MatchFlashDLL() = true, DLL name = FlashC2000F021, m_bNeedsFlashProperties = true, m_bNeedsFlashUtility = true, m_iBackupType = 1
555463: 0x00007610 68787 3 C28xx_CPU2 FLASH C: FlashProgrammerUtility::WriteAlgorithmToMemory( wr_pll.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ )
558050: 0x0000CBF8 68851 3 C28xx_CPU2 GTI C: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C1CE, 0x00000001, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0xC1A90040 )
558072: 0x0000CBF8 68860 3 C28xx_CPU2 GTI R: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C1CE, 0x00000001, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000A5A5 ) = 0x00000000
558110: 0x0000CBF8 68860 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C1CE, 0x00000000, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x00001901 )
558154: 0x0000CBF8 68866 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C1CE, 0x00000000, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x56C31901 ) = 0x00000000
558247: 0x0000CBF8 68877 3 C28xx_CPU2 GTI C: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000001, 0x000001B4, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x56C31901 )
559997: 0x0000CBF8 69056 3 C28xx_CPU2 GTI R: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000001, 0x000001B4, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000A5A5 ) = 0x00000000
560035: 0x0000CBF8 69057 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000000, 0x000001B4, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x00000200 )
563535: 0x0000CBF8 69385 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000000, 0x000001B4, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x761F0200 ) = 0x00000000
563637: 0x0000CBF8 69402 3 C28xx_CPU2 GTI C: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C1B4, 0x00000001, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x761F0200 )
563747: 0x0000CBF8 69415 3 C28xx_CPU2 GTI R: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C1B4, 0x00000001, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000A5A5 ) = 0x00000000
563787: 0x0000CBF8 69430 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C1B4, 0x00000000, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000FFFF )
564007: 0x0000CBF8 69458 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C1B4, 0x00000000, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0152FFFF ) = 0x00000000
564426: 0x00007610 69497 3 C28xx_CPU2 FLASH R: FlashProgrammerUtility::WriteAlgorithmToMemory( wr_pll.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ ) = (null)
566563: 0x00007610 69803 3 C28xx_CPU2 FLASH C: FlashProgrammerUtility::WriteAlgorithmToMemory( erasew.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ )
569949: 0x0000CBF8 69961 3 C28xx_CPU2 GTI C: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C683, 0x00000001, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0xC65E0040 )
569971: 0x0000CBF8 69966 3 C28xx_CPU2 GTI R: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C683, 0x00000001, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000A5A5 ) = 0x00000000
570009: 0x0000CBF8 69966 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C683, 0x00000000, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x00001901 )
570053: 0x0000CBF8 69973 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C683, 0x00000000, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x56C31901 ) = 0x00000000
570146: 0x0000CBF8 69990 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000001, 0x000001B4, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000A5A5 )
573640: 0x0000CBF8 70324 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000001, 0x000001B4, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0xA5A5A5A5 ) = 0x00000000
573737: 0x0000CBF8 70341 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C1B4, 0x00000001, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000A5A5 )
573951: 0x0000CBF8 70363 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C1B4, 0x00000001, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0xA5A5A5A5 ) = 0x00000000
574041: 0x0000CBF8 70388 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C1CE, 0x00000001, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000A5A5 )
574079: 0x0000CBF8 70393 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C1CE, 0x00000001, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0xA5A5A5A5 ) = 0x00000000
574169: 0x0000CBF8 70401 3 C28xx_CPU2 GTI C: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000001, 0x00000669, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0xA5A5A5A5 )
580739: 0x0000CBF8 71005 3 C28xx_CPU2 GTI R: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000001, 0x00000669, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000A5A5 ) = 0x00000000
580785: 0x0000CBF8 71019 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000000, 0x00000669, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000761F )
593925: 0x0000CBF8 72424 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000000, 0x00000669, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0005761F ) = 0x00000000
594032: 0x0000CBF8 72456 3 C28xx_CPU2 GTI C: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C669, 0x00000001, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0005761F )
594142: 0x0000CBF8 72466 3 C28xx_CPU2 GTI R: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C669, 0x00000001, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000A5A5 ) = 0x00000000
594180: 0x0000CBF8 72485 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C669, 0x00000000, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000FFFF )
594400: 0x0000CBF8 72535 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C669, 0x00000000, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0152FFFF ) = 0x00000000
594653: 0x00007610 72561 3 C28xx_CPU2 FLASH R: FlashProgrammerUtility::WriteAlgorithmToMemory( erasew.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ ) = (null)
596927: 0x00007610 72996 3 C28xx_CPU2 FLASH C: FlashProgrammerUtility::WriteAlgorithmToMemory( progw.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ )
633038: 0x0000CBF8 76544 3 C28xx_CPU2 GTI C: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C873, 0x00000001, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0xC84E0040 )
633060: 0x0000CBF8 76548 3 C28xx_CPU2 GTI R: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C873, 0x00000001, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000A5A5 ) = 0x00000000
633098: 0x0000CBF8 76549 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C873, 0x00000000, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x00001901 )
633142: 0x0000CBF8 76556 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C873, 0x00000000, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x56C31901 ) = 0x00000000
633235: 0x0000CBF8 76563 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000001, 0x00000669, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000A5A5 )
646369: 0x0000CBF8 77827 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000001, 0x00000669, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0xA5A5A5A5 ) = 0x00000000
646474: 0x0000CBF8 77851 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C669, 0x00000001, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000A5A5 )
646688: 0x0000CBF8 77874 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C669, 0x00000001, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0xA5A5A5A5 ) = 0x00000000
646826: 0x0000CBF8 77928 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C683, 0x00000001, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000A5A5 )
646864: 0x0000CBF8 77933 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C683, 0x00000001, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0xA5A5A5A5 ) = 0x00000000
646954: 0x0000CBF8 77945 3 C28xx_CPU2 GTI C: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000001, 0x00000859, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0xA5A5A5A5 )
655508: 0x0000CBF8 78729 3 C28xx_CPU2 GTI R: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000001, 0x00000859, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000A5A5 ) = 0x00000000
655611: 0x0000CBF8 78749 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000000, 0x00000859, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000761F )
672719: 0x0000CBF8 80338 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000000, 0x00000859, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0005761F ) = 0x00000000
672819: 0x0000CBF8 80381 3 C28xx_CPU2 GTI C: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C859, 0x00000001, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0005761F )
672929: 0x0000CBF8 80393 3 C28xx_CPU2 GTI R: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C859, 0x00000001, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000A5A5 ) = 0x00000000
672966: 0x0000CBF8 80394 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C859, 0x00000000, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000FFFF )
673186: 0x0000CBF8 80416 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C859, 0x00000000, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0152FFFF ) = 0x00000000
673439: 0x00007610 80437 3 C28xx_CPU2 FLASH R: FlashProgrammerUtility::WriteAlgorithmToMemory( progw.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ ) = (null)
708739: 0x00007610 83655 3 C28xx_CPU2 FLASH C: FlashProgrammerUtility::WriteAlgorithmToMemory( verifyw.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ )
712700: 0x0000CBF8 83739 3 C28xx_CPU2 GTI C: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C97C, 0x00000001, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0xC9570040 )
712722: 0x0000CBF8 83743 3 C28xx_CPU2 GTI R: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C97C, 0x00000001, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000A5A5 ) = 0x00000000
712759: 0x0000CBF8 83744 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C97C, 0x00000000, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x00001901 )
712803: 0x0000CBF8 83749 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C97C, 0x00000000, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x56C31901 ) = 0x00000000
712896: 0x0000CBF8 83756 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000001, 0x00000859, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000A5A5 )
729998: 0x0000CBF8 85609 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000001, 0x00000859, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0xA5A5A5A5 ) = 0x00000000
730095: 0x0000CBF8 85627 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C859, 0x00000001, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000A5A5 )
730309: 0x0000CBF8 85650 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C859, 0x00000001, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0xA5A5A5A5 ) = 0x00000000
730399: 0x0000CBF8 85683 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C873, 0x00000001, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000A5A5 )
730437: 0x0000CBF8 85690 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C873, 0x00000001, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0xA5A5A5A5 ) = 0x00000000
730527: 0x0000CBF8 85696 3 C28xx_CPU2 GTI C: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000001, 0x00000962, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0xA5A5A5A5 )
740141: 0x0000CBF8 86615 3 C28xx_CPU2 GTI R: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000001, 0x00000962, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000A5A5 ) = 0x00000000
740186: 0x0000CBF8 86636 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000000, 0x00000962, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000761F )
759414: 0x0000CBF8 88437 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000000, 0x00000962, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0005761F ) = 0x00000000
759523: 0x0000CBF8 88493 3 C28xx_CPU2 GTI C: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C962, 0x00000001, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0005761F )
759633: 0x0000CBF8 88504 3 C28xx_CPU2 GTI R: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C962, 0x00000001, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000A5A5 ) = 0x00000000
759673: 0x0000CBF8 88523 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C962, 0x00000000, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000FFFF )
759893: 0x0000CBF8 88550 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C962, 0x00000000, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0152FFFF ) = 0x00000000
760138: 0x00007610 88569 3 C28xx_CPU2 FLASH R: FlashProgrammerUtility::WriteAlgorithmToMemory( verifyw.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ ) = (null)
762824: 0x00007610 88885 3 C28xx_CPU2 FLASH C: FlashProgrammerUtility::WriteAlgorithmToMemory( progw.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ )
766428: 0x0000CBF8 88959 3 C28xx_CPU2 GTI C: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C873, 0x00000001, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0xC84E0040 )
766450: 0x0000CBF8 88962 3 C28xx_CPU2 GTI R: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C873, 0x00000001, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x00000004 ) = 0x00000000
766488: 0x0000CBF8 88963 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C873, 0x00000000, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x00001901 )
766532: 0x0000CBF8 88969 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C873, 0x00000000, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x56C31901 ) = 0x00000000
766625: 0x0000CBF8 88977 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000000, 0x00000859, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000761F )
783733: 0x0000CBF8 90602 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000000, 0x00000859, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0005761F ) = 0x00000000
783833: 0x0000CBF8 90627 3 C28xx_CPU2 GTI C: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C859, 0x00000001, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0005761F )
783943: 0x0000CBF8 90637 3 C28xx_CPU2 GTI R: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C859, 0x00000001, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000AAA9 ) = 0x00000000
783981: 0x0000CBF8 90654 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C859, 0x00000000, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000FFFF )
784201: 0x0000CBF8 90673 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C859, 0x00000000, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0152FFFF ) = 0x00000000
784441: 0x00007610 90694 3 C28xx_CPU2 FLASH R: FlashProgrammerUtility::WriteAlgorithmToMemory( progw.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ ) = (null)
789353: 0x00007610 91146 3 C28xx_CPU2 FLASH C: FlashProgrammerUtility::WriteAlgorithmToMemory( verifyw.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ )
793327: 0x0000CBF8 91225 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C97C, 0x00000000, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x00001901 )
793371: 0x0000CBF8 91231 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C97C, 0x00000000, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x56C31901 ) = 0x00000000
793464: 0x0000CBF8 91239 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000000, 0x00000962, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000761F )
812692: 0x0000CBF8 93137 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000000, 0x00000962, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0005761F ) = 0x00000000
812794: 0x0000CBF8 93156 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C962, 0x00000000, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000FFFF )
813014: 0x0000CBF8 93176 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C962, 0x00000000, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0152FFFF ) = 0x00000000
813257: 0x00007610 93225 3 C28xx_CPU2 FLASH R: FlashProgrammerUtility::WriteAlgorithmToMemory( verifyw.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ ) = (null)
815679: 0x00007610 93474 3 C28xx_CPU2 FLASH C: FlashProgrammerUtility::WriteAlgorithmToMemory( pwrite_en.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ )
818227: 0x0000CBF8 93535 3 C28xx_CPU2 GTI C: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C140, 0x00000001, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0xC1140040 )
818249: 0x0000CBF8 93538 3 C28xx_CPU2 GTI R: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C140, 0x00000001, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x000096C4 ) = 0x00000000
818287: 0x0000CBF8 93540 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C140, 0x00000000, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x00001901 )
818331: 0x0000CBF8 93544 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C140, 0x00000000, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x56C31901 ) = 0x00000000
818424: 0x0000CBF8 93554 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000000, 0x00000126, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x000028AD )
820788: 0x0000CBF8 94295 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000000, 0x00000126, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x017028AD ) = 0x00000000
820888: 0x0000CBF8 94374 3 C28xx_CPU2 GTI C: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C126, 0x00000001, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x017028AD )
820998: 0x0000CBF8 94387 3 C28xx_CPU2 GTI R: GTI_READMEM_BLK( 0x000001F99D6D85B0, 0x0000C126, 0x00000001, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000EC05 ) = 0x00000000
821036: 0x0000CBF8 94398 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C126, 0x00000000, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000FFFF )
821256: 0x0000CBF8 94437 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C126, 0x00000000, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0152FFFF ) = 0x00000000
821496: 0x00007610 94455 3 C28xx_CPU2 FLASH R: FlashProgrammerUtility::WriteAlgorithmToMemory( pwrite_en.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ ) = (null)
824200: 0x00007610 94723 3 C28xx_CPU2 FLASH C: FlashProgrammerUtility::WriteAlgorithmToMemory( pwrite_dis.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ )
826728: 0x0000CBF8 94802 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C140, 0x00000000, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x00001901 )
826772: 0x0000CBF8 94808 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C140, 0x00000000, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x56C31901 ) = 0x00000000
826865: 0x0000CBF8 94819 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000000, 0x00000126, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x000028AD )
829229: 0x0000CBF8 95035 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000000, 0x00000126, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x017028AD ) = 0x00000000
829329: 0x0000CBF8 95053 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C126, 0x00000000, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000FFFF )
829549: 0x0000CBF8 95076 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C126, 0x00000000, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0152FFFF ) = 0x00000000
829791: 0x00007610 95098 3 C28xx_CPU2 FLASH R: FlashProgrammerUtility::WriteAlgorithmToMemory( pwrite_dis.alg, F2837xD_f021_c28x.nfl, C:\ti\ccs2050\ccs\ccs_base\DebugServer\bin\..\..\c2000\nowFlash\libraries\ ) = (null)
830937: 0x00007610 95215 3 C28xx_CPU2 FLASH C: FlashProgrammerUtility::RestoreBackedUpRAM()
831398: 0x0000CBF8 95256 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000001, 0x00000962, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000A5A5 )
850620: 0x0000CBF8 97055 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C000, 0x00000001, 0x00000962, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0xA5A5A5A5 ) = 0x00000000
850717: 0x0000CBF8 97072 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C126, 0x00000001, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000EC05 )
850931: 0x0000CBF8 97094 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C126, 0x00000001, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x28E2EC05 ) = 0x00000000
851021: 0x0000CBF8 97118 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C140, 0x00000001, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x000096C4 )
851059: 0x0000CBF8 97123 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C140, 0x00000001, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0xD00896C4 ) = 0x00000000
851149: 0x0000CBF8 97129 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C859, 0x00000001, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000AAA9 )
851363: 0x0000CBF8 97150 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C859, 0x00000001, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x7640AAA9 ) = 0x00000000
851453: 0x0000CBF8 97157 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C873, 0x00000001, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x00000004 )
851491: 0x0000CBF8 97164 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C873, 0x00000001, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x1E300004 ) = 0x00000000
851581: 0x0000CBF8 97171 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C962, 0x00000001, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000A5A5 )
851795: 0x0000CBF8 97194 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C962, 0x00000001, 0x0000001A, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0xA5A5A5A5 ) = 0x00000000
851885: 0x0000CBF8 97200 3 C28xx_CPU2 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C97C, 0x00000001, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0x0000A5A5 )
851923: 0x0000CBF8 97206 3 C28xx_CPU2 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6D85B0, 0x0000C97C, 0x00000001, 0x00000004, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D3BE304 = 0xA5A5A5A5 ) = 0x00000000
916929: 0x00007610 103390 3 C28xx_CPU2 FLASH R: FlashProgrammerUtility::RestoreBackedUpRAM()

Appendix C: Test setup, pattern fill and readback from CPU1 before the load

88247: 0x0000CBF8 11298 3 C28xx_CPU1 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6CCBC0, 0x0000C000, 0x00000001, 0x00001000, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D1792D4 = 0x0000A5A5 )
121021: 0x0000CBF8 16022 3 C28xx_CPU1 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6CCBC0, 0x0000C000, 0x00000001, 0x00001000, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D1792D4 = 0xA5A5A5A5 ) = 0x00000000
146072: 0x0000CBF8 16592 3 C28xx_CPU1 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6CCBC0, 0x0000D000, 0x00000001, 0x00001000, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D1792D4 = 0x0000A5A5 )
178846: 0x0000CBF8 29775 3 C28xx_CPU1 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6CCBC0, 0x0000D000, 0x00000001, 0x00001000, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D1792D4 = 0xA5A5A5A5 ) = 0x00000000
203677: 0x0000CBF8 30473 3 C28xx_CPU1 GTI C: GTI_WRITEMEM_BLK( 0x000001F99D6CCBC0, 0x0000E000, 0x00000001, 0x00001000, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D1792D4 = 0x0000A5A5 )
236451: 0x0000CBF8 36138 3 C28xx_CPU1 GTI R: GTI_WRITEMEM_BLK( 0x000001F99D6CCBC0, 0x0000E000, 0x00000001, 0x00001000, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D1792D4 = 0xA5A5A5A5 ) = 0x00000000
262341: 0x0000CBF8 37091 3 C28xx_CPU1 GTI C: GTI_READMEM_BLK( 0x000001F99D6CCBC0, 0x0000C000, 0x00000001, 0x00001000, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D1792D4 = 0x00000000 )
278731: 0x0000CBF8 38767 3 C28xx_CPU1 GTI R: GTI_READMEM_BLK( 0x000001F99D6CCBC0, 0x0000C000, 0x00000001, 0x00001000, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D1792D4 = 0x0000A5A5 ) = 0x00000000
278806: 0x0000CBF8 38879 3 C28xx_CPU1 GTI C: GTI_READMEM_BLK( 0x000001F99D6CCBC0, 0x0000D000, 0x00000001, 0x00001000, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D1792D4 = 0x0000A5A5 )
295196: 0x0000CBF8 40521 3 C28xx_CPU1 GTI R: GTI_READMEM_BLK( 0x000001F99D6CCBC0, 0x0000D000, 0x00000001, 0x00001000, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D1792D4 = 0x0000A5A5 ) = 0x00000000
295260: 0x0000CBF8 40594 3 C28xx_CPU1 GTI C: GTI_READMEM_BLK( 0x000001F99D6CCBC0, 0x0000E000, 0x00000001, 0x00001000, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D1792D4 = 0x0000A5A5 )
311650: 0x0000CBF8 42133 3 C28xx_CPU1 GTI R: GTI_READMEM_BLK( 0x000001F99D6CCBC0, 0x0000E000, 0x00000001, 0x00001000, 0x20000003, "R|W|AS2", 0x00000000, 0x00000002, *0x000001F99D1792D4 = 0x0000A5A5 ) = 0x00000000

TMS320F28379D: CLA Vs C28 speed

rajesh beesetty — Wed, 04 Nov 2026 13:48:02 GMT

Part Number: TMS320F28379D

Hi there!
I am trying to realize PI algorithm independently on F28379D's C28 and CLA. I observed, the CLA is faster than C28.
One C28 PI loop did its job in 750ns and CLA in 500ns. I measured this using the GPIO Highing and Clearing.

I pressumed it the otherway.

Can u please comfirm is this is OK or Im missing something-like configuring it wrongly..

Cheers,
Rajesh.

TMS320F28P550SJ: HRPWM Phase shift validation

Mohansai Yajaman — Wed, 04 Nov 2026 13:47:18 GMT

Part Number: TMS320F28P550SJ

Hello TI Team,

I am using the hrpwm_ex10_phaseshift_updown_sfo example on an F28P55x device to validate high-resolution phase shift functionality between synchronized ePWM modules.

The example is working correctly, and I can vary the phase shift using TBPHS and TBPHSHR. However, I would like to understand how TI validated the actual phase-shift timing accuracy, especially since HRPWM supports very fine timing resolution in the picosecond range.

We are currently measuring the timing difference between the ePWM1 pulse and ePWM2 pulse using a 2 GS/s oscilloscope and 500 MHz probes.

Is this setup sufficient for validating HRPWM phase-shift accuracy, or does TI recommend an alternative measurement approach for observing sub-nanosecond timing changes introduced by TBPHSHR?

While testing the example, I observed that when:

TBPHS = 0
TBPHSHR = 0

there is still approximately 13 ns delay between the ePWM1 pulse and ePWM2 pulse. As I have configured clock of 150MHz

EPWM1-Frequency 100KHz,TBPRD-750, CMPA-375.

EPWM2-Frequency 100KHz,TBPRD-750, CMPA-375,PHSEN-1.

TMDSHVMTRINSPIN: TMDSHVMTRPFCKIT – Integration with the F28069M ISO Control Card

Sachith Wijesooriya — Wed, 04 Nov 2026 13:29:44 GMT

Part Number: TMDSHVMTRINSPIN
Other Parts Discussed in Thread: MOTORWARE

Hi TI Community,

I have a question regarding the compatibility of the TMDSHVMTRPFCKIT (High Voltage Motor Control and PFC Kit, Revision 1.1), and I would appreciate your support.

I currently have this kit, and according to the hardware reference guide, it is designed to work with either the F28035 or F28335 control card. However, I would like to know whether it is possible to use the F28069M ISO control card with this kit.

I have previous experience using the DRV8305-HC-EVM, which also originally came with an F28035 control card. I was able to successfully configure and operate that board using the F28069M ISO control card.

However, when I try to use the F28069M ISO control card with the TMDSHVMTRPFCKIT, it does not seem to work. I suspect that I might be missing some hardware or software configuration, or perhaps the F28069M is not compatible with this kit.

Could anyone clarify the following?

Is the F28069M ISO control card compatible with the TMDSHVMTRPFCKIT?
If it is compatible, are there any hardware modifications or jumper configuration changes required?
Are there any specific software, GPIO, or peripheral configuration changes needed to make it work?

Any guidance or suggestions would be greatly appreciated.

Thank you for your support!

TMS320F28P650SK: TMS320F28P650 variants pin-compatibility

Harald Schweitzer — Wed, 04 Nov 2026 08:14:12 GMT

Part Number: TMS320F28P650SK

Hi,

There are variants with and without EtherCAT subsystem, e.g. TMS320F28P650SK6 and TMS320F28P650SK7. We wonder if these devices are pin-compatible? (Beside the EtherCAT capabilities)

Thank you,

F29H859TU-Q1: Crypto Driver

Jenney Ni — Wed, 04 Nov 2026 06:39:41 GMT

Part Number: F29H859TU-Q1

Hi all,

When customer used Autosar, do we have Crypto Driver(CDD Crypto Driver) which meets Autosar stnadard? These driver is in MCAL package?

Regards,

Jenney

F29H850TU: Why the linker warning "warning #10272-D: section relative symbols from different output sections cannot be mixed;" ?

Ronan DANIOUX — Tue, 03 Nov 2026 18:37:14 GMT

Part Number: F29H850TU

Hello,

Why is the warning "warning #10272-D: section relative symbols from different output sections cannot be mixed;" still active when the relative symbols are defined in a GROUP or when the option "--honor_cmdfile_order" is used ?

In these 2 contexts, there should be no issue with the calculation and so no warning should be reported.

Thank you

LAUNCHXL-F28P65X: MATLAB/Simulink Deployment Issue with F28P65x LaunchPad

Daniel Waleniak — Tue, 03 Nov 2026 16:41:54 GMT

Part Number: LAUNCHXL-F28P65X
Other Parts Discussed in Thread: C2000WARE

Dear C2000 Team,

I've been trying to set up a MATLAB/Simulink workflow with the LAUNCHXL-F28P65X LaunchPad, but I've encountered an issue during deployment and was hoping you could help me identify the cause.

I'm currently using:

MATLAB/Simulink R2026a
Code Composer Studio 20.3.1
C2000Ware 5.02.00.00
LAUNCHXL-F28P65X LaunchPad

I was following the MathWorks Getting Started with C2000 Microcontroller Blockset tutorial, using the F28P65x as my target hardware.

The code generation and compilation stages appear to complete successfully. MATLAB generates the ert_rtw directory along with the .out, .elf, and .hex files. I can also open and inspect the generated C source code.

However, the process fails during the "Download Executable to Hardware" stage with the following error:

ReferenceError: "ScriptingEnvironment" is not defined

The error points to runProgram.js in the MATLAB support package. I inspected the JavaScript file, and the required import statements appear to be present, although the script may need further investigation.

I've also encountered a potentially related issue with CCS 20.3.1. The IDE opens, but the status indicator in the bottom-right corner remains stuck at "Initializing", even after launching it with a new workspace. Additionally, the project import option in CCS is grayed out, preventing me from importing any existing projects.

I've tried reconfiguring the hardware setup in MATLAB and checking the Java runtime configuration, but the deployment error remains unchanged.

Do you have any suggestions on what might be causing these issues, or which part of the setup I should investigate next?

I would be happy to provide additional details or diagnostic logs if needed.

Thanks in advance for your help!

Best regards,

Daniel Waleniak

TMS320F280049: new section in errata: ePWM: One-Shot/CBC Trip Event DCxEVTy.force Does Not Set the Trip Condition

Marco Schlüter — Tue, 03 Nov 2026 13:44:16 GMT

Part Number: TMS320F280049

Hi,
I have a question concerning the newest Errata for the TMS320F280049: www.ti.com/.../SPRZ439 and the explanation in https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1527882/tms320f280049-why-forcing-dacevt1-doesn-t-shut-down-pwm-ost-flag-is-not-set/5940272?tisearch=e2e-sitesearch&keymatch=TMS320F280049%20async# .

In many of our projects we do have configured some PWMs and TZs with digital compare events for current limitation for CBC and OSHT events.
We do have set DCxCTL[EVT1/2FRCSYNCSEL] = 1 (passes the DCxEVT signal through the async path) and TZSEL[DCxEVTy] = 1 and TZCTL[TZA] = 2: EPWM1A is forced low on a trip event.
This is working for us for many years now as intended. But reading the errata and the linked answer to someones question it seems as this should not work or we should change this to sync path. Can you confirm that we do not need to change this for our existing products as we do not need the TZFRC.DCxEVTy?

Thank you