https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/<p style="display:none;">blank</p>en-USTelligent Community 13https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1651717/launchxl-f28379d-launchxl-f28379d-launchpad-power-failure-when-first-connected-to-pc/6388318Thu, 18 Jun 2026 21:15:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:8a6e8b4a-3118-4b74-8f85-3e731f0ae6aeStevan DuraskovicHello Chen, I discussed with the team, and they determined that this case does not qualify for replacement. The board can be replaced if there is issue when received and board could be damaged with not proper ESD protection as well. Thank you for your understanding.https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1656668/tms320f28388d-how-to-configure-jtag-daisy-chain-in-ccs-20-5/6388244Thu, 18 Jun 2026 20:02:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:fc5e2b2b-6756-4f4a-8602-7dffa89e568fSongyan HuThank you so much!!!! I change the names in previous test. But I did not change all of them. After I change all the names to a unique one. Now, I can flash the project and then connect to each CPU in these two TMS320F28388. This method also works for the daisy chain with SCANSTA112.https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1656357/tms320f28379d-tms320f28379d-trouble-halting-target-cpu-error--1156-0x0/6388239Thu, 18 Jun 2026 19:55:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:d0766066-f870-4da4-9086-c8529f61ef09Matt KukuckaTo add on: I confirmed that I could program the flash after putting my device in wait boot and disabling all reset on connect options. Best, Matthttps://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1656357/tms320f28379d-tms320f28379d-trouble-halting-target-cpu-error--1156-0x0/6388236Thu, 18 Jun 2026 19:54:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:232c098d-82d4-4bb5-849b-6d4619024811Matt KukuckaHello, Can you please put the device in WAIT boot? This will keep the device spinning in the Boot ROM (inherently insecure memory) on reset. Therefore, you will be able to connect to device without the JTAG being interrupted by ECSL protection. Best, Matthttps://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1655580/tms320f28388d-sci-response-drops-stop-bit/6388160Thu, 18 Jun 2026 18:35:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:fa7f4af8-c60a-4670-8524-709f32a1328aAllison NguyenHi Kent, Delaney is out of office until next week. In the meantime, I can try to make a suggestion. Can you try to reorder GPIO Init to come before the SCI init and double check your GPIO settings? You can follow the pattern from the reference examples in C2000Ware: {C2000Ware}\driverlib\f2838x\examples\c28x\sci. e.g. all GPIO configuration moves before SCI_setConfig/SCI_enableModule, GPIO_setPinConfig (MUX to SCI function) and GPIO_setQualificationMode(ASYNC) present, TX pad type changed from PULLUP to STD (standard push-pull) I don&#39;t see the full GPIO init in the screen captures you sent so just want to rule this out. Best Regards, Allisonhttps://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1656323/f29h859tu-q1-how-to-realize-the-lpost-mpost/6388095Thu, 18 Jun 2026 17:31:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:ae891191-0244-4a8d-999d-0fbd2db93d81Prarthan BhattIts in SSU chapter -- SECCFG Sector Memory Map You can check below addr how they change wrt to the Sysconfig seccfg.c generated SECCFG Address Offset : LPOST - 0x7AC (8 bits) MPOST - 0x7AF (2 bits) Thankshttps://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1656668/tms320f28388d-how-to-configure-jtag-daisy-chain-in-ccs-20-5/6388076Thu, 18 Jun 2026 17:15:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:642241cb-30f3-480f-b0a8-0aaf32ff1fd7KiHello Songyan, [quote userid=&quot;704817&quot; url=&quot;~/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1656668/tms320f28388d-how-to-configure-jtag-daisy-chain-in-ccs-20-5&quot;]Then I saw someone said to configure a daisy chain, two ccxml file is required. In each ccxml file, you need bypass one device[/quote] No, you do not need to use bypass. However you need to make sure that CPUs, routers, etc have unique names. Please see: TMS320F280034: .ccxml file setting of 3 TMS320F280034 daisy chain connection Also note that currently there is a known issue with hardware breakpoints on daisy chained environments. It only works with CCS 20.4.1. I would recommend downgrading to CCS 20.4.1. RE: TMS320F28388D: Cannot set Flash hardware breakpoints on any non-first device in a JTAG daisy chain. Thanks kihttps://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1656323/f29h859tu-q1-how-to-realize-the-lpost-mpost/6387918Thu, 18 Jun 2026 15:45:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:0bc81fbd-3fe8-46fe-b70f-6fc06fa73158Shuqing ZhouHi Prarthan, Thanks for your clarification, i were confused by the TRM before [quote userid=&quot;559325&quot; url=&quot;~/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1656323/f29h859tu-q1-how-to-realize-the-lpost-mpost/6387725&quot;]As I said before this register EMU_BOOT_DIAG is not used and not relevant. We are removing this register from upcoming releases.[/quote] What&#39;s the address of SECCFG shows the POST enable or not? BRs Shuqinghttps://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1656357/tms320f28379d-tms320f28379d-trouble-halting-target-cpu-error--1156-0x0/6387850Thu, 18 Jun 2026 15:14:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:8e1cdc17-59a0-42fc-8a83-fc32fbd7e1f8Donovan SandersYes, I have setup these debug scripts to unlock both cores and both cores are unlocked when I check the registers but I still get this error when trying to debug. I am saying I am connected to CPU1 yes, but this error seems to possibly be about the CPU2_CLA1 being halted (which I do not use either CLA in my current project). But I have unchecked the settings to keep breakpoints and when I have attached successfully there are no breakpoints set. I wondering why this low power issue still occurs, as I cannot debug the device. I can load symbols only to unlock the drive, but I cannot upload any new code to the device. It seems to act as if its still locked after the unlock occurs using my gel scripts which I see unlock successfully in the console output.https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1656357/tms320f28379d-tms320f28379d-trouble-halting-target-cpu-error--1156-0x0/6387844Thu, 18 Jun 2026 15:10:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:333bd2f4-83f8-45e7-ac47-86b95d57a9ffMatt KukuckaHello, Those are startup scripts executed for multi-core devices since UniFlash allows you to debug/program the CPU1 and CPU2 subsystems. In this case, the debugger maps registers, applies script files (GEL), and loads symbols for both CPU2 and its CLA (CPU2_CLA1). The error occurs when you attempt to connect to CPU1. Best, Matthttps://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1651424/f29h850tu-rtdma-transfer-of-adc-results-fails-after-power-cycle-on-f29h85x-som-evm-no-dma-interrupt/6387814Thu, 18 Jun 2026 14:54:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:539198f6-2ad1-4a37-b9da-51b54b4d657fAishwarya RajeshTakagi-san, Thanks for the update. Best Regards, Aishwaryahttps://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1656317/f29h859tu-q1-f29-compiler-compatibility/6387809Thu, 18 Jun 2026 14:52:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:0c180697-dda7-4a79-84d0-e052d770fd3dGregMKita, For details regarding changes in C29 releases, please see the included README.html and see below: https://software-dl.ti.com/ccs/esd/documents/sdto_cgt_compiler_version_numbers_and_what_they_mean.html Regards, Greghttps://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1655986/tms320f28379d-can-unlock-drive-but-can-t-erase-flash/6387769Thu, 18 Jun 2026 14:29:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:97efb014-afe1-4913-9a8f-67324c674fcfMatt KukuckaHello, We need to prevent any reset from occurring after you connect and unlock the zone, since the Boot ROM will relock the DCSM zone. Please navigate to the CCS GEL file for the debug session (Tools &gt; GEL Files) and comment out the following GEL_Reset() call in OnPreFileLoaded(). OnPreFileLoaded() is executed before File-&gt;Load Program. Best, Matthttps://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1656668/tms320f28388d-how-to-configure-jtag-daisy-chain-in-ccs-20-5Thu, 18 Jun 2026 14:01:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:13901852-e0a5-4e10-a264-4bc8fbd4fc63Songyan HuPart Number: TMS320F28388D Other Parts Discussed in Thread: SCANSTA112 Hi! Our goal is to use one JTAG port to program 16 TMS320F28388D control board with two SCANSTA112. I start to test the daisy chain with two TMS320F28388D control boards. The picture below show the result I get. The hardware connection is correct. I think the problem is the target cnfigure file(.ccxml). First I use this target configure setting to test JTAG daisy chain with two control board without SCANSTA112 and with SCANSTA112. I can test and pass the connection test. I can also debug without project. When I debug without project, the THREADS menu on the left hand side only shows one TMS32028388D. And when I try to connect CPU1 shows in THREADS menu, I will get his error: IcePick_C_0: Error connecting to the target: (Error -1265 @ 0x0) Device ID is not recognized or is not supported by driver. Confirm device and debug probe configuration is correct, or update device driver. (Emulation package 20.5.0.3902) Then I add one more TMS320F28388D to the ccxml file. I can not test connection. When I click test connection button, it gives me a window with nothing. When I try to start debug without project, it gives me this notification: can not generate board data file. An internal error occurred while creating the board config text. Then I think I do not need debug, I just need program these device. So I create a empty example project in the CCS. I get the same result as the test I did before. Then I saw someone said to configure a daisy chain, two ccxml file is required. In each ccxml file, you need bypass one device. Like this: It still can not generate board data as before. Thanks for every comment! Songyan,TMS320F28388DSCANSTA112Test &amp; Measurementhttps://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1656323/f29h859tu-q1-how-to-realize-the-lpost-mpost/6387725Thu, 18 Jun 2026 13:53:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:ce63eaf4-71d7-4ab1-beb1-4260c7c2889aPrarthan BhattHi, As I said before this register EMU_BOOT_DIAG is not used and not relevant. We are removing this register from upcoming releases. Please refer to SECCFG programmed and the POST results after power-up to see the status as mentioned in safety manual. Thankshttps://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1655580/tms320f28388d-sci-response-drops-stop-bit/6387721Thu, 18 Jun 2026 13:48:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:94ce165b-719d-4e0e-9384-666431837d62Kent PfeiferDelaney, Here is a .bmp of the scope trace for a working &#39;A&#39;: The trace D0 is the input (RX) from the PC to the chip on GPIO9, D1 is the output trace (TX) from the chip to the PC on GPIO8. The yellow trace is an analog channel connected to GPIO8 to look for noise. Below is a similar trace for when it fails showing the missing stop-bit for a non-working &#39;A&#39;: The stop bit is there from the PC in both cases, but in the non-working case, the stop bit is not sent by the chip back to the PC. I checked the sysconfig to verify that LSPCLK is 50MHz and it appears to be set correctly. Thanks, Kenthttps://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1644513/f28e120sc-pparallel-gpio-bootloader-error/6387720Thu, 18 Jun 2026 13:48:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:770ed3b7-58fb-4e4f-9da3-5f8081bc0603Matt KukuckaHello, I used the F28E12x LaunchPad , which only brings out the GPIOs for alternate parallel boot. Operation should be the same between boot modes. [quote userid=&quot;246413&quot; url=&quot;~/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1644513/f28e120sc-pparallel-gpio-bootloader-error/6387586&quot;]Do you have connected some crystal/resonators/external clock to the F28E120? Can you provide the scheme?[/quote] On reset, the Boot ROM is clocked from the internal oscillator, regardless of external clocks being connected. Their presence/absence won&#39;t impact the ROM bootloaders execution. The board&#39;s design files are provided here: https://www.ti.com/tool/LAUNCHXL-F28E12X#design-files [quote userid=&quot;246413&quot; url=&quot;~/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1644513/f28e120sc-pparallel-gpio-bootloader-error/6387586&quot;]The default boot mode selection pins is GPIO24 and GPIO32. I have this pins tied to L before reset pin is asserted to H. For BOOTDEF = 0x00 the GPIO24 is also one of the D0-D7 GPIO pins..[/quote] This shouldn&#39;t impact the bootloader functionality. As long as the hold time for boot-mode pins (1.5ms) is not violated, parallel boot will be executed and will be able to use GPIO24. Source: F28E12x Datasheet Best, Matthttps://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1656650/tms320f28335-ccs-12-dsp-bios-v5-xx-examples-hwi_xxx-and-pie_intxxx-errorsThu, 18 Jun 2026 13:35:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:938fde9d-b698-4ad6-9203-f535b7d7fc1aBadMonkeyPart Number: TMS320F28335 Project New-&gt;ezdsp28335 Examples-&gt;hello example Won&#39;t build. Gets a ton of errors. See attached txt file. CCS12_build_issue_hello_example.txtIndustrial AutomationTMS320F28335https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1655105/tms320f28p650dk-ethercat-failed-to-upload-sdo-when-final-address-is-odd/6387662Thu, 18 Jun 2026 13:10:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:baa4b3e1-389c-4f55-884e-dfd36a57cad7Kunal WasnikHi , I have configured some settings in ssc tool similar to yours, and with length 253 i am able to go into operation mode. Just to be sure did you update the eeprom with latest esi file in twincat also right? Also can you change the SYSCTL_REGWRITE_DELAY in syctl.h file in sdk. and try again. There was issues with earlier specified delay of #69. Regards Kunal.https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1656317/f29h859tu-q1-f29-compiler-compatibility/6387645Thu, 18 Jun 2026 12:48:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:620c6b42-6a70-4a34-99ed-4627408ca2beKiHello Kita, I have brought this thread to the attention of the compiler experts for further analysis. Thanks ki