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Hi
I am using TMX320F28377D for my application, where i have to know a reset due to external watchdog(this is required to evaluate the external watchdog timer itself). We use a loop counter (global variable) till the watchdog resets. After reset we read the content f the variable to determine its validity. But the content is not available after reset. We tried to bypass _c_int00 routine so that, up on reset variables are not cleared. Please let me know the complete and clear procedure to retain RAM variables upon soft resets.
We are running code from flash.
Thanks in advance...
Regards,
Srinivas Parasaram
Hi Srinivas,
This device has RAM INIT feature which clears all the RAMs. BOOT-ROM code uses this feature to clear all the RAMs on any RESET which toggles XRSn pin. Since WD reset toggles XRSn pins, all the RAM content get clear. Plesae refer "3.12 CPU1 Boot ROM Flow Chart" in TRM for complete BOOT flow.
Is it possible to save this variable in some location which doesn't get CLEAR on WD reset?
Regards,
Vivek Singh
Hi Vivek,
Thanks for the reply.
Do you mean , any external memory or some memory with in the controller (CPU2 memory)? Is there any such RAM within CPU1 or CPU2 (Shared RAM). If yes, we can store the variable in that place. Is it Ok?
Regards,
Srinivas P
For example following are two registers which are used for HIBERNATE mode and get reset by power on reset only (not by XRSn).
HIBBOOTMODE
ORESTOREADDR
If your application is not using the HIBERNATE mode then you can use these register location (refer TRM for detail) to store the variable.
Regards,
Vivek Singh
Hi Vivek,
I have the similar application requirements to the OP. I am using a TMS320F28075 device, and using the HIBBOOTMODE also worked for me. I may want to store more information to diagnose the WDT cause. Are there any other registers (other than HIBBOOTMODE and IORESTOREADDR), or RAM locations, that do not get reset on XRSn?
Thanks!