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F28M35 Concerto Debug Flash and Ram Simulatenously

JasonHaedt
Genius 3320 points
Other Parts Discussed in Thread: F28M35H52C

Dear TI,

I am struggling to debug code that I have flashed in one device (M3) and running in RAM on the other.  Is this capability possible with the F28M35H52C device?  I see an errata of the device and was wondering if this is the reason:

Advisory —Debug: Global Run of Cortex™-M3 and TMS320C28x™ is not Operational ..................................... 8
Advisory —Debug: Cross-Trigger Functionality is Limited When Using Breakpoints on the C28x Core.................... 8

Sincerely,

Jason

  • 0
    TI__Mastermind 22025 points

    Jason,

    No there is nothing that will prevent you from running one core from RAM and the other from Flash.  This errata is describing a debug feature which doesn't function on this device. 

    I suspect you are having trouble because of the bootROM.  All of the examples are built to boot the C28 from flash.  Look for  the IPCBoot command function in the M3 example.  Try changing the argument to boot to RAM and see if that fixes your problem.


    Trey

  • 0 in reply to Trey German289
    Genius 3320 points

    Team,

    After trial and error I did realize there is a certain sequence in order to debug this:

    Once you have both cores connected, and the ram/flash loaded, you have to do the following steps in order

    C28x CPU reset
    M3CPU reset
    M3 CPU run

    C28x CPU run 

    After that you should be able to hit any breakpoints and do any debugging you want to do.

    -Jason