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DMA initialization before peripheral initalization?

Guru 20075 points

Other Parts Discussed in Thread: TMS320F28335

Hello,

The Example_2833xMcBSP_DLB_DMA example comments that the DMA should be intialized before the peripheral (McBSP) (see code below).  Why is this necessary?

Why can't I just initialize the McBSP at power-up and then init and start the DMA when I need to perform a DMA task.  The reason I ask this question is that I'll be reusing DMA channels for different task during runtime. 

Stephen

"     init_dma();       // 1. When using DMA, initialize DMA with peripheral interrupts first.
   }
   start_dma();
   mcbsp_init_dlb();   // 2.  Then initialize and release peripheral (McBSP) from Reset."

 

  • Stephen,

    The example initializes the DMA first because as soon as the McBSP transmitter is initialized it is empty and generates a request.  We setup the DMA first so that it is immediately able to process this request and then the subsequent receive request.

    Certainly in your application you could disable, reconfigure and re-enable DMA channels at run time.  You'll just need to be careful in how you choreograph that process so that no data is lost and your application functions correctly.

    Trey

  • Hello Trey,

    Thanks for the info.

    My application will first use four DMAs (DMA#1,#2,#3,#4) and two McBSPs  to acquire data from two external ADC converters.  After acquiring the data, the application will reuse two of DMAs (DMA#1,#2) and one McBSP to send the data to external RAM.  During the RAM transfer, the application will use two other DMAs (DMA#5,#6)  and one McBSP will be used to transmit data to two external DACs.

    My application is using the DMA function from the TMS320F28335 example programs, i.e. DMACHxAddrConfig, DMACHxBurstConfig and etc.

    How do I specifically disable and re-enable the DMA channel?  Is there anything else I should be doing?

    I was thinking about switching ISR functions on the fly.  Do you see any issues with this?  Or maybe I should have only one ISR for each DMA. What do you think?

    Stephen

  • Sounds like you're on the right track Stephen, but keep in mind there is only 1 DMA.  Multiple transfers can be configured at one time, but only one transfer can be occurring at any instantaneous point of time.

    Take a look at the DMA guide for the F28335.  You ought to be able to tell if a transfer is currently occuring by looking at the PRIORITYSTAT register.  Enabling and disabling of channels can be done in each channels control register.  My recommendation would be to not step on DMA transfers when disabling channels (i.e. wait for a channel to not be active before disabling it).  Otherwise you should be fine.

    Trey

  • Am I correct to say the channel control register's Halt bit disables the channel and the Run bit enables the channel?

    Once the DMA transfer complete ISR senses all data has been transferred, the DMA transfer complete ISR will diasable (Halt bit = 1) the DMA channel and McBSP's  XRDY interrupt (XINTM = 00).  Then, the DMA transfer complete ISR will reconfigure the DMA and the McBSP and start (=Run bit = 1) the DMA channel. 

    Does that sound ok? 

    Does setting XINT ENA = 0 in the MFFINT register disable XRDY interrupts?  The diagram in the McBSP reference uses an or gate, which doesn't seem right.

    Stephen

     

  • Yep, halt disables/stops a channel while run enables it.

    Sounds like a valid plan to reconfigure the channel during its ISR.

    Setting XINT ENA does in fact disable XRDY interrupts.

    Trey