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Concerto not working correctly on reboot

Other Parts Discussed in Thread: CONTROLSUITE

I am working with the F28M35x device. I'm outputting PWM signals from the device. It works properly when I run it from the debugger. However, when I reboot the device by power cycling it, the device does not behave in the same way - the PWM signals still exist, but look like they are at a different switching frequency and their duty cycle no longer changes. EDIT: Too be clear, I'm not even sure it's a proper PWM signal. The pins show periodic square waves, but clearly not at the right switching frequency. The "duty cycle" is constant, but the CMPA and CMPB registers should default to zero and otherwise the only time they are set in code is by a function that should not give a constant duty cycle.

The code is programmed into flash, not RAM, so that isn't the issue. What else might be changing between running from the debugger vs rebooting?


Thanks,

Mike

  • Mike,

    are you building stand-alone flash configuration? Looks like either flash wait state or some clock config dependency.

     

    Best Regards

    Santosh

     

  • Hi Santosh,


    Can you explain further what that means? I've copied below the relevant code from main.c on the M3.

        // Disable Protection
        HWREG(SYSCTL_MWRALLOW) =  0xA5A5A5A5;

        // Sets up PLL, M3 running at 75MHz and C28 running at 150MHz
        SysCtlClockConfigSet(SYSCTL_USE_PLL | (SYSCTL_SPLLIMULT_M & 0xF) |
                SYSCTL_SYSDIV_1 | SYSCTL_M3SSDIV_2 |
                SYSCTL_XCLKDIV_4);

        RAMMReqSharedMemAccess((S0_ACCESS | S1_ACCESS),C28_MASTER);

        memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);

        // Call Flash Initialization to setup flash waitstates
        // This function must reside in RAM
        FlashInit();


    ...

        IPCMtoCBootControlSystem(CBROM_MTOC_BOOTMODE_BOOT_FROM_FLASH);

  • That's setting up PLL as source code comments say, then setting up Shared RAM access for C28x, loading RAMFUNCs and setting up Flash Wait states.

    The last function is sending boot mode IPC command to C28x.

    Now, are you able to get execute all above without a problem with debugger connected? I believe your C28x code is handling the PWMs? are you configuring the GPIO Core select for the needed IOs for C28x to control?

     

    Best Regards

    Santosh

     

  • Yes everything works great from the debugger. The C28 handles the PWMs. All the GPIO core select is there, I just didn't copy and paste it since it shouldn't make a difference between running from the debugger or reboot.

    Everything works when running from the debugger. That means all the pins are configured right, the PWMs are configured right. It only behaves weirdly when I reboot (by power cycling).

  • Mike,

    thanks.  Do you configure the core select before sending the boot mode IPC command to C28x, it is preferred to do so, so that by the time C28x configures PWM and C-GPIO the GPIO is ready.

    can you answer below?

    1.> Is your boot mode GPIO set to boot to flash?

    2.> is your entry point on Both M3 and C28x at the FLASH_ENTRY_POINTs as needed by boot ROM (This is documented in TRM), you can inspect your map file to check if what is getting loaded at the needed entry point locations.

    3.> with debugger connected after you load flash on both M3 and C28x set break points at main on both the cores.

    3.1> now go to the PLL registers in memory or register or expressions window and manually bypass PLL and reset the PLL multiplier and M3SYSDIVSEL register to their reset defaults.

    4.> now reset C28 and reset M3

    5.> Now run M3, it should hit your main on M3

    6.> now run C28x, this should run C-Boot ROM. Pause C28x and see where PC is at in your dis-assembly , it should point to an IDLE instruction

    7.> if 6 is good, then run C28x and it should be running waiting for IPC

    8.> Now put a break point in M3 application main() at the line after the function call to send boot mode IPC command to C28x and run. Does it hit the break point?

    9.> if 8 is good then you should see C82x stop at the main on C28x application.

    10.> now, run C28x and run M3 or vice-versa.

     

    do you see it working now?

     

    Best Regards

    Santosh

  • Hi Santosh,


    I've tried my best to follow your steps but there are items I don't know.

    1. I don't believe I've changed this from the default. Is this determined by reading the value on the pins? GPIO 43 is connected by jumper to to MII_RXDV on the controlcard, however.

    2. The entry point symbol in the .map file is "_c_int00" for both.

    3.1. I'm not exactly sure I've followed this step correctly. How do I bypass the PLL? I can manually change SYSCTL.SYSPLLCTL to 0...00 and SYSPLLMULT to zeros and M3SSDIVSEL to 0...10. Is that what you mean?

    6. If I view the disassembly, it appears to be an empty line. Is that the same as an IDLE instruction? EDIT: Nevermind it says IDLE.

    If all that's correct, then I've followed your steps. The problem still shows up.

  • Hi Santosh,


    I've tried it with a number of examples, and the problem still persists. For example:

    Can you download and try the F28M35x workshop, located here:

    http://processors.wiki.ti.com/index.php/F28M35x_Workshop

    I just tried the TI-provided Solution for Lab 4-2. It exhibits the same behavior. The PWM looks good running from the debugger, but rebooting the device changes the behavior. It appears to be a single narrow pulse in a long switching period.

    Thanks

  • MIke,

    on 1> the boot mode GPIOs needed and values needed for boot to flash is documented in the device datasheet. There would be switches on the control card to set the device to boot to flash. It is probably set to that but its good to check. Other way to check this is ..just reset M3 and set a break point at 0x00200030 on M3 in the disassembly window and run. see if it hits the breakpoint, if it does then your boot mode pins are set to boot-to-flash.

    on 2.> where is _c_int00 mapped to, what is getting loaded to the boot-to-flash entry point? send me your MAP file, I can take a quick look at it.

    on 3.1.> yes, just reset the register locations in memory window to their reset value , you can get the reset value from TRM.

    on 6.> This is on C28x, why is it empty line, if possible send me a snapshot of your monitor.

    on your project properties look at build configurations, what does it say?

    if I unzip the lab files it the lab4_2 doesn't show any thing, I should probably follow the lab guide, I wouldn't get to this atleast until next Wednesday.

    could you try a simple dual core blinky example from the control suite and see if you can get it to run stand-alone on power cycle? It will tell us if you are missing something basic, try to look at the build configurations in the project and see if you choosing STAND_ALONE FLASH build.

     

    Best Regards

    Santosh

  • I'll get back to you tomorrow morning, but I just wanted to point out that the Labs have fully completed solutions in the Solutions folder of the zip.

  • 1. Yes it hits the breakpoint at 0x00200030

    2. It looks like it is mapped to 00205ff1. I've attached it anyway if you want to look at it (I had to change the file extension to .txt)

    ******************************************************************************
                      TI ARM Linker PC v5.1.3                      
    ******************************************************************************
    >> Linked Fri Jan 24 13:54:21 2014
    
    OUTPUT FILE NAME:   <MG M3.out>
    ENTRY POINT SYMBOL: "_c_int00"  address: 00205ff1
    
    
    MEMORY CONFIGURATION
    
             name            origin    length      used     unused   attr    fill
    ----------------------  --------  ---------  --------  --------  ----  --------
      CSM_ECSL_Z1           00200000   00000024  00000000  00000024  RWIX
      CSM_RSVD_Z1           00200024   0000000c  00000000  0000000c  RWIX
      RESETISR              00200030   00000008  00000006  00000002  R  X
      INTVECS               00201000   000001b0  000001b0  00000000  R  X
      FLASHLOAD             00201200   00002e00  000020bc  00000d44  R  X
      FLASH                 00204000   0007bf00  00004256  00077caa  R  X
      CSM_RSVD_Z2           0027ff00   000000dc  00000000  000000dc  RWIX
      CSM_ECSL_Z2           0027ffdc   00000024  00000000  00000024  RWIX
      C0                    20000000   00002000  000000bc  00001f44  RW X
      C1                    20002000   00002000  00000500  00001b00  RW X
      BOOT_RSVD             20004000   00000900  00000000  00000900  R  X
      C2                    20004900   00001700  00000000  00001700  RW X
      C3                    20006000   00002000  00000000  00002000  RW X
      S0                    20008000   00002000  00000000  00002000  RW X
      S1                    2000a000   00002000  00000000  00002000  RW X
      S2                    2000c000   00002000  00000000  00002000  RW X
      S3                    2000e000   00002000  00000000  00002000  RW X
      S4                    20010000   00002000  00000000  00002000  RW X
      S5                    20012000   00002000  00000000  00002000  RW X
      S6                    20014000   00002000  00000000  00002000  RW X
      S7                    20016000   00002000  00000000  00002000  RW X
      CTOMRAM               2007f000   00000800  00000000  00000800  R  X
      MTOCRAM               2007f800   00000800  00000000  00000800  RW X
    
    
    SEGMENT ALLOCATION MAP
    
    run origin  load origin   length   init length attrs members
    ----------  ----------- ---------- ----------- ----- -------
    00200030    00200030    00000006   00000006    r-x
      00200030    00200030    00000006   00000006    r-x .resetisr
    00201000    00201000    000001b0   000001b0    r--
      00201000    00201000    000001b0   000001b0    r-- .intvecs
    002012bc    002012bc    00002000   00000000    rw-
      002012bc    002012bc    00002000   00000000    rw- SHARERAMS0
    00204000    00204000    000021f0   000021f0    r-x
      00204000    00204000    0000209a   0000209a    r-x .text
      0020609c    0020609c    00000154   00000154    r-- .const
    002061f0    002061f0    00002000   00000000    rw-
      002061f0    002061f0    00002000   00000000    rw- SHARERAMS2
    002081f0    002081f0    00000068   00000068    r--
      002081f0    002081f0    00000068   00000068    r-- .cinit
    20000000    00201200    000000bc   000000bc    r-x
      20000000    00201200    000000bc   000000bc    r-x ramfuncs
    20002000    20002000    00000500   00000000    rw-
      20002000    20002000    00000258   00000000    rw- .vtable
      20002258    20002258    00000190   00000000    rw- .bss
      200023e8    200023e8    00000100   00000000    rw- .stack
      200024e8    200024e8    00000018   00000000    rw- .data
    
    
    SECTION ALLOCATION MAP
    
     output                                  attributes/
    section   page    origin      length       input sections
    --------  ----  ----------  ----------   ----------------
    .resetisr 
    *          0    00200030    00000006     
                      00200030    00000006     startup_ccs.obj (.resetisr:ResetISR)
    
    .intvecs   0    00201000    000001b0     
                      00201000    000001b0     startup_ccs.obj (.intvecs)
    
    ramfuncs   0    00201200    000000bc     RUN ADDR = 20000000
                      00201200    000000bc     driverlib.lib : flash.obj (ramfuncs)
    
    SHARERAMS0 
    *          0    002012bc    00002000     UNINITIALIZED
                      002012bc    00002000     MG M3.obj (SHARERAMS0)
    
    .text      0    00204000    0000209a     
                      00204000    00000960     driverlib.lib : sysctl.obj (.text)
                      00204960    0000058c                   : ipc_lite.obj (.text)
                      00204eec    0000044c                   : gpio.obj (.text)
                      00205338    000002b8                   : interrupt.obj (.text)
                      002055f0    0000022c                   : timer.obj (.text)
                      0020581c    000001dc     MG M3.obj (.text:main)
                      002059f8    00000180     driverlib.lib : ipc_util.obj (.text)
                      00205b78    00000108                   : ram.obj (.text)
                      00205c80    000000ac                   : watchdog.obj (.text)
                      00205d2c    0000009c     rtsv7M3_T_le_eabi.lib : memcpy_t2.obj (.text)
                      00205dc8    00000094                           : auto_init.obj (.text)
                      00205e5c    0000005e                           : copy_decompress_rle.obj (.text)
                      00205eba    00000002     startup_ccs.obj (.text:FaultISR)
                      00205ebc    00000044     rtsv7M3_T_le_eabi.lib : cpy_tbl.obj (.text)
                      00205f00    00000044                           : exit.obj (.text)
                      00205f44    0000003c     MG M3.obj (.text:Shared_Ram_dataRead_m3)
                      00205f80    00000038     MG M3.obj (.text:Shared_Ram_dataWrite_m3)
                      00205fb8    00000036     driverlib.lib : cpu.obj (.text)
                      00205fee    00000002     startup_ccs.obj (.text:IntDefaultHandler)
                      00205ff0    00000034     rtsv7M3_T_le_eabi.lib : boot.obj (.text)
                      00206024    00000018                           : args_main.obj (.text)
                      0020603c    00000014                           : _lock.obj (.text)
                      00206050    00000012                           : copy_zero_init.obj (.text:decompress:ZI)
                      00206062    00000002     startup_ccs.obj (.text:NmiSR)
                      00206064    00000010     MG M3.obj (.text:Timer0IntHandler)
                      00206074    0000000e     rtsv7M3_T_le_eabi.lib : copy_decompress_none.obj (.text:decompress:none)
                      00206082    00000002     --HOLE-- [fill = 0]
                      00206084    00000006     driverlib.lib : sysctl.obj (.text:SysCtlDelay)
                      0020608a    00000006     rtsv7M3_T_le_eabi.lib : copy_decompress_rle.obj (.text:decompress:rle24)
                      00206090    0000000a     driverlib.lib : flash.obj (.tramp.FlashInit.1)
    
    .const     0    0020609c    00000154     
                      0020609c    00000088     driverlib.lib : gpio.obj (.const:g_pulGPIOBaseAddrs)
                      00206124    00000064                   : sysctl.obj (.const)
                      00206188    00000048                   : interrupt.obj (.const:g_pulRegs)
                      002061d0    00000020                   : interrupt.obj (.const)
    
    SHARERAMS2 
    *          0    002061f0    00002000     UNINITIALIZED
                      002061f0    00002000     MG M3.obj (SHARERAMS2)
    
    .cinit     0    002081f0    00000068     
                      002081f0    00000010     (.cinit..data.load) [load image, compression = rle]
                      00208200    0000000c     (__TI_handler_table)
                      0020820c    00000004     --HOLE-- [fill = 0]
                      00208210    00000008     (.cinit..bss.load) [load image, compression = zero_init]
                      00208218    00000008     (.cinit..vtable.load) [load image, compression = zero_init]
                      00208220    00000008     (.cinit.SHARERAMS0.load) [load image, compression = zero_init]
                      00208228    00000008     (.cinit.SHARERAMS2.load) [load image, compression = zero_init]
                      00208230    00000028     (__TI_cinit_table)
    
    .vtable    0    20002000    00000258     UNINITIALIZED
                      20002000    00000258     driverlib.lib : interrupt.obj (.vtable)
    
    .bss       0    20002258    00000190     UNINITIALIZED
                      20002258    00000190     MG M3.obj (.bss:Voltage_M3)
    
    .stack     0    200023e8    00000100     UNINITIALIZED
                      200023e8    00000100     --HOLE--
    
    .data      0    200024e8    00000018     UNINITIALIZED
                      200024e8    00000008     rtsv7M3_T_le_eabi.lib : _lock.obj (.data)
                      200024f0    00000008                           : exit.obj (.data)
                      200024f8    00000004     MG M3.obj (.data)
                      200024fc    00000004     rtsv7M3_T_le_eabi.lib : stkdepth_vars.obj (.data)
    
    CtoM       0    2007f000    00000004     DSECT
                      2007f000    00000004     MG M3.obj (CtoM)
    
    GETBUFFER 
    *          0    2007f000    00000000     DSECT
    
    GETWRITEIDX 
    *          0    2007f000    00000000     DSECT
    
    PUTREADIDX 
    *          0    2007f000    00000000     DSECT
    
    
    LINKER GENERATED COPY TABLES
    
    __TI_cinit_table @ 00208230 records: 5, size/record: 8, table size: 40
    	.data: load addr=002081f0, load size=00000010 bytes, run addr=200024e8, run size=00000018 bytes, compression=rle
    	.bss: load addr=00208210, load size=00000008 bytes, run addr=20002258, run size=00000190 bytes, compression=zero_init
    	.vtable: load addr=00208218, load size=00000008 bytes, run addr=20002000, run size=00000258 bytes, compression=zero_init
    	SHARERAMS0: load addr=00208220, load size=00000008 bytes, run addr=002012bc, run size=00002000 bytes, compression=zero_init
    	SHARERAMS2: load addr=00208228, load size=00000008 bytes, run addr=002061f0, run size=00002000 bytes, compression=zero_init
    
    
    LINKER GENERATED HANDLER TABLE
    
    __TI_handler_table @ 00208200 records: 3, size/record: 4, table size: 12
    	index: 0, handler: __TI_zero_init
    	index: 1, handler: __TI_decompress_rle24
    	index: 2, handler: __TI_decompress_none
    
    
    FAR CALL TRAMPOLINES
    
    callee name               trampoline name
       callee addr  tramp addr   call addr  call info
    --------------  -----------  ---------  ----------------
    FlashInit                 $Tramp$TT$L$PI$$FlashInit
       20000001     00206090     0020583e   MG M3.obj (.text:main)
    
    [1 trampolines]
    [1 trampoline calls]
    
    
    GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name 
    
    address    name
    --------   ----
    2007f000   AdcValue
    00205f01   C$$EXIT
    00205fe5   CPUbasepriGet
    00205fdf   CPUbasepriSet
    00205fb9   CPUcpsid
    00205fcf   CPUcpsie
    00205fc5   CPUprimask
    00205fdb   CPUwfi
    20000001   FlashInit
    20000057   FlashSetup
    00204fbf   GPIODirModeGet
    00204f8f   GPIODirModeSet
    0020502f   GPIOIntTypeGet
    00204fe9   GPIOIntTypeSet
    002050c3   GPIOPadConfigGet
    00205069   GPIOPadConfigSet
    00205251   GPIOPinConfigure
    002052b7   GPIOPinConfigureCoreSelect
    00205127   GPIOPinIntClear
    0020510b   GPIOPinIntDisable
    002050ff   GPIOPinIntEnable
    00205119   GPIOPinIntStatus
    002052e1   GPIOPinLock
    002052d7   GPIOPinLockStatus
    00205159   GPIOPinRead
    00205165   GPIOPinTypeCAN
    0020523d   GPIOPinTypeEPI
    00205179   GPIOPinTypeGPIOInput
    0020518d   GPIOPinTypeGPIOOutput
    002051a9   GPIOPinTypeGPIOOutputOD
    002051bd   GPIOPinTypeI2C
    002051d5   GPIOPinTypeSSI
    002051ed   GPIOPinTypeTimer
    00205201   GPIOPinTypeUART
    00205229   GPIOPinTypeUSBAnalog
    00205215   GPIOPinTypeUSBDigital
    00205307   GPIOPinUnlock
    0020515f   GPIOPinWrite
    0020512d   GPIOPortIntRegister
    00205145   GPIOPortIntUnregister
    002059f9   IPCCtoMFlagAcknowledge
    00205a03   IPCCtoMFlagBusy
    00204cf1   IPCLiteCtoMClearBits
    00204d51   IPCLiteCtoMClearBits_Protected
    00204bd9   IPCLiteCtoMDataRead
    00204dc5   IPCLiteCtoMDataWrite
    00204e25   IPCLiteCtoMDataWrite_Protected
    00204e95   IPCLiteCtoMFunctionCall
    00204c21   IPCLiteCtoMSetBits
    00204c7b   IPCLiteCtoMSetBits_Protected
    00204ba7   IPCLiteMtoCBootBranch
    00204a73   IPCLiteMtoCClearBits
    00204ab9   IPCLiteMtoCClearBits_Protected
    00204989   IPCLiteMtoCDataRead
    00204aff   IPCLiteMtoCDataWrite
    00204b39   IPCLiteMtoCDataWrite_Protected
    00204b79   IPCLiteMtoCFunctionCall
    00204961   IPCLiteMtoCGetResult
    002049c7   IPCLiteMtoCSetBits
    00204a1d   IPCLiteMtoCSetBits_Protected
    00205a55   IPCMtoCBootControlSystem
    00205a15   IPCMtoCFlagBusy
    00205a33   IPCMtoCFlagClear
    00205a27   IPCMtoCFlagSet
    00205a3f   IPCMtoCSharedRamConvert
    0020548d   IntDisable
    00205419   IntEnable
    0020534f   IntFlashVTable
    00205345   IntMasterDisable
    0020533b   IntMasterEnable
    00205579   IntPendClear
    00205503   IntPendSet
    002053ff   IntPriorityGet
    002053b1   IntPriorityGroupingGet
    0020539f   IntPriorityGroupingSet
    00205fe5   IntPriorityMaskGet
    00205fdf   IntPriorityMaskSet
    002053d3   IntPrioritySet
    0020535d   IntRAMVTable
    0020536b   IntRegister
    00205395   IntUnregister
    00205c09   RAMControlInitL0L3Ram
    00205b9f   RAMControlInitM1MsgRam
    00205b79   RAMMReqSharedMemAccess
    002012bc   RamfuncsLoadEnd
    000000bc   RamfuncsLoadSize
    00201200   RamfuncsLoadStart
    200000bc   RamfuncsRunEnd
    000000bc   RamfuncsRunSize
    20000000   RamfuncsRunStart
    00200031   ResetISR
    UNDEFED    SHT$$INIT_ARRAY$$Base
    UNDEFED    SHT$$INIT_ARRAY$$Limit
    00205f45   Shared_Ram_dataRead_m3
    00205f81   Shared_Ram_dataWrite_m3
    002046db   SysCtlC28Disable
    002046c3   SysCtlC28Enable
    002045f5   SysCtlClockConfigGet
    002045c1   SysCtlClockConfigSet
    0020435d   SysCtlClockDividersSet
    0020464d   SysCtlClockGet
    00204495   SysCtlClockPllConfig
    0020429d   SysCtlDeepSleep
    00206085   SysCtlDelay
    00204839   SysCtlEnableAERRNMI
    0020401f   SysCtlFlashSizeGet
    0020470f   SysCtlGPIOAHBDisable
    002046f3   SysCtlGPIOAHBEnable
    0020484f   SysCtlGetNmiConfig
    00204867   SysCtlGetNmiFlagStatus
    00204859   SysCtlGetNmiInterruptStatus
    002048bb   SysCtlHoldSubSystemInReset
    00204885   SysCtlNmiFlgClr
    0020489d   SysCtlNmiFlgClrAll
    0020486f   SysCtlNmiIsSet
    00204261   SysCtlPeripheralClockGating
    00204235   SysCtlPeripheralDeepSleepDisable
    0020420b   SysCtlPeripheralDeepSleepEnable
    0020417b   SysCtlPeripheralDisable
    00204155   SysCtlPeripheralEnable
    002041a1   SysCtlPeripheralIsEnabled
    0020402b   SysCtlPeripheralPresent
    0020408d   SysCtlPeripheralReset
    002041e5   SysCtlPeripheralSleepDisable
    002041bf   SysCtlPeripheralSleepEnable
    00204463   SysCtlPowerOffPLL
    002048e5   SysCtlReleaseSubSystemFromReset
    00204289   SysCtlReset
    002042c9   SysCtlResetCauseClear
    002042bd   SysCtlResetCauseGet
    00204001   SysCtlSRAMSizeGet
    00205fdb   SysCtlSleep
    00204909   SysCtlSubSystemReset
    0020481b   SysCtlUSBPLLConfigGet
    00204789   SysCtlUSBPLLConfigSet
    00204765   SysCtlUSBPLLDisable
    0020472d   SysCtlUSBPLLEnable
    002042e5   SysCtlXPllClockDividerSet
    00206065   Timer0IntHandler
    0020560d   TimerConfigure
    00205653   TimerControlEvent
    00205627   TimerControlLevel
    00205667   TimerControlStall
    0020563d   TimerControlTrigger
    0020567d   TimerControlWaitOnTrigger
    002055ff   TimerDisable
    002055f1   TimerEnable
    00205805   TimerIntClear
    002057f1   TimerIntDisable
    002057e9   TimerIntEnable
    0020574b   TimerIntRegister
    002057fb   TimerIntStatus
    0020579d   TimerIntUnregister
    00205715   TimerLoadGet
    00205703   TimerLoadSet
    0020573f   TimerMatchGet
    0020572d   TimerMatchSet
    002056d9   TimerPrescaleGet
    002056f7   TimerPrescaleMatchGet
    002056e5   TimerPrescaleMatchSet
    002056c7   TimerPrescaleSet
    002056bd   TimerRTCDisable
    002056b3   TimerRTCEnable
    00205721   TimerValueGet
    20002258   Voltage_M3
    00205c89   WatchdogEnable
    00205d07   WatchdogIntClear
    00205cf3   WatchdogIntEnable
    00205cd3   WatchdogIntRegister
    00205cfd   WatchdogIntStatus
    00205ce3   WatchdogIntUnregister
    00205ca7   WatchdogLock
    00205cb7   WatchdogLockState
    00205ccb   WatchdogReloadGet
    00205cc7   WatchdogReloadSet
    00205c9d   WatchdogResetDisable
    00205c93   WatchdogResetEnable
    00205c81   WatchdogRunning
    00205d1b   WatchdogStallDisable
    00205d0d   WatchdogStallEnable
    00205caf   WatchdogUnlock
    00205ccf   WatchdogValueGet
    200024e8   __STACK_END
    00000100   __STACK_SIZE
    00208230   __TI_CINIT_Base
    00208258   __TI_CINIT_Limit
    00208200   __TI_Handler_Table_Base
    0020820c   __TI_Handler_Table_Limit
    00000001   __TI_args_main
    00205dc9   __TI_auto_init
    200024f0   __TI_cleanup_ptr
    00206075   __TI_decompress_none
    0020608b   __TI_decompress_rle24
    200024f4   __TI_dtors_ptr
    002081f0   __TI_static_base__
    00206051   __TI_zero_init
    00205d2d   __aeabi_memcpy
    00205d2d   __aeabi_memcpy4
    00205d2d   __aeabi_memcpy8
    ffffffff   __binit__
    ffffffff   __c_args__
    200023e8   __stack
    00206025   _args_main
    00205ff1   _c_int00
    200024e8   _lock
    0020604b   _nop
    00206043   _register_lock
    0020603d   _register_unlock
    200024ec   _unlock
    00205f05   abort
    ffffffff   binit
    00205ebd   copy_in
    00205f0d   exit
    20002000   g_pfnRAMVectors
    00201000   g_pfnVectors
    200024f8   i
    002012bc   m3_r_array
    002061f0   m3_r_w_array
    0020581d   main
    200024fc   main_func_sp
    00205d2d   memcpy
    
    
    GLOBAL SYMBOLS: SORTED BY Symbol Address 
    
    address    name
    --------   ----
    00000001   __TI_args_main
    000000bc   RamfuncsLoadSize
    000000bc   RamfuncsRunSize
    00000100   __STACK_SIZE
    00200031   ResetISR
    00201000   g_pfnVectors
    00201200   RamfuncsLoadStart
    002012bc   RamfuncsLoadEnd
    002012bc   m3_r_array
    00204001   SysCtlSRAMSizeGet
    0020401f   SysCtlFlashSizeGet
    0020402b   SysCtlPeripheralPresent
    0020408d   SysCtlPeripheralReset
    00204155   SysCtlPeripheralEnable
    0020417b   SysCtlPeripheralDisable
    002041a1   SysCtlPeripheralIsEnabled
    002041bf   SysCtlPeripheralSleepEnable
    002041e5   SysCtlPeripheralSleepDisable
    0020420b   SysCtlPeripheralDeepSleepEnable
    00204235   SysCtlPeripheralDeepSleepDisable
    00204261   SysCtlPeripheralClockGating
    00204289   SysCtlReset
    0020429d   SysCtlDeepSleep
    002042bd   SysCtlResetCauseGet
    002042c9   SysCtlResetCauseClear
    002042e5   SysCtlXPllClockDividerSet
    0020435d   SysCtlClockDividersSet
    00204463   SysCtlPowerOffPLL
    00204495   SysCtlClockPllConfig
    002045c1   SysCtlClockConfigSet
    002045f5   SysCtlClockConfigGet
    0020464d   SysCtlClockGet
    002046c3   SysCtlC28Enable
    002046db   SysCtlC28Disable
    002046f3   SysCtlGPIOAHBEnable
    0020470f   SysCtlGPIOAHBDisable
    0020472d   SysCtlUSBPLLEnable
    00204765   SysCtlUSBPLLDisable
    00204789   SysCtlUSBPLLConfigSet
    0020481b   SysCtlUSBPLLConfigGet
    00204839   SysCtlEnableAERRNMI
    0020484f   SysCtlGetNmiConfig
    00204859   SysCtlGetNmiInterruptStatus
    00204867   SysCtlGetNmiFlagStatus
    0020486f   SysCtlNmiIsSet
    00204885   SysCtlNmiFlgClr
    0020489d   SysCtlNmiFlgClrAll
    002048bb   SysCtlHoldSubSystemInReset
    002048e5   SysCtlReleaseSubSystemFromReset
    00204909   SysCtlSubSystemReset
    00204961   IPCLiteMtoCGetResult
    00204989   IPCLiteMtoCDataRead
    002049c7   IPCLiteMtoCSetBits
    00204a1d   IPCLiteMtoCSetBits_Protected
    00204a73   IPCLiteMtoCClearBits
    00204ab9   IPCLiteMtoCClearBits_Protected
    00204aff   IPCLiteMtoCDataWrite
    00204b39   IPCLiteMtoCDataWrite_Protected
    00204b79   IPCLiteMtoCFunctionCall
    00204ba7   IPCLiteMtoCBootBranch
    00204bd9   IPCLiteCtoMDataRead
    00204c21   IPCLiteCtoMSetBits
    00204c7b   IPCLiteCtoMSetBits_Protected
    00204cf1   IPCLiteCtoMClearBits
    00204d51   IPCLiteCtoMClearBits_Protected
    00204dc5   IPCLiteCtoMDataWrite
    00204e25   IPCLiteCtoMDataWrite_Protected
    00204e95   IPCLiteCtoMFunctionCall
    00204f8f   GPIODirModeSet
    00204fbf   GPIODirModeGet
    00204fe9   GPIOIntTypeSet
    0020502f   GPIOIntTypeGet
    00205069   GPIOPadConfigSet
    002050c3   GPIOPadConfigGet
    002050ff   GPIOPinIntEnable
    0020510b   GPIOPinIntDisable
    00205119   GPIOPinIntStatus
    00205127   GPIOPinIntClear
    0020512d   GPIOPortIntRegister
    00205145   GPIOPortIntUnregister
    00205159   GPIOPinRead
    0020515f   GPIOPinWrite
    00205165   GPIOPinTypeCAN
    00205179   GPIOPinTypeGPIOInput
    0020518d   GPIOPinTypeGPIOOutput
    002051a9   GPIOPinTypeGPIOOutputOD
    002051bd   GPIOPinTypeI2C
    002051d5   GPIOPinTypeSSI
    002051ed   GPIOPinTypeTimer
    00205201   GPIOPinTypeUART
    00205215   GPIOPinTypeUSBDigital
    00205229   GPIOPinTypeUSBAnalog
    0020523d   GPIOPinTypeEPI
    00205251   GPIOPinConfigure
    002052b7   GPIOPinConfigureCoreSelect
    002052d7   GPIOPinLockStatus
    002052e1   GPIOPinLock
    00205307   GPIOPinUnlock
    0020533b   IntMasterEnable
    00205345   IntMasterDisable
    0020534f   IntFlashVTable
    0020535d   IntRAMVTable
    0020536b   IntRegister
    00205395   IntUnregister
    0020539f   IntPriorityGroupingSet
    002053b1   IntPriorityGroupingGet
    002053d3   IntPrioritySet
    002053ff   IntPriorityGet
    00205419   IntEnable
    0020548d   IntDisable
    00205503   IntPendSet
    00205579   IntPendClear
    002055f1   TimerEnable
    002055ff   TimerDisable
    0020560d   TimerConfigure
    00205627   TimerControlLevel
    0020563d   TimerControlTrigger
    00205653   TimerControlEvent
    00205667   TimerControlStall
    0020567d   TimerControlWaitOnTrigger
    002056b3   TimerRTCEnable
    002056bd   TimerRTCDisable
    002056c7   TimerPrescaleSet
    002056d9   TimerPrescaleGet
    002056e5   TimerPrescaleMatchSet
    002056f7   TimerPrescaleMatchGet
    00205703   TimerLoadSet
    00205715   TimerLoadGet
    00205721   TimerValueGet
    0020572d   TimerMatchSet
    0020573f   TimerMatchGet
    0020574b   TimerIntRegister
    0020579d   TimerIntUnregister
    002057e9   TimerIntEnable
    002057f1   TimerIntDisable
    002057fb   TimerIntStatus
    00205805   TimerIntClear
    0020581d   main
    002059f9   IPCCtoMFlagAcknowledge
    00205a03   IPCCtoMFlagBusy
    00205a15   IPCMtoCFlagBusy
    00205a27   IPCMtoCFlagSet
    00205a33   IPCMtoCFlagClear
    00205a3f   IPCMtoCSharedRamConvert
    00205a55   IPCMtoCBootControlSystem
    00205b79   RAMMReqSharedMemAccess
    00205b9f   RAMControlInitM1MsgRam
    00205c09   RAMControlInitL0L3Ram
    00205c81   WatchdogRunning
    00205c89   WatchdogEnable
    00205c93   WatchdogResetEnable
    00205c9d   WatchdogResetDisable
    00205ca7   WatchdogLock
    00205caf   WatchdogUnlock
    00205cb7   WatchdogLockState
    00205cc7   WatchdogReloadSet
    00205ccb   WatchdogReloadGet
    00205ccf   WatchdogValueGet
    00205cd3   WatchdogIntRegister
    00205ce3   WatchdogIntUnregister
    00205cf3   WatchdogIntEnable
    00205cfd   WatchdogIntStatus
    00205d07   WatchdogIntClear
    00205d0d   WatchdogStallEnable
    00205d1b   WatchdogStallDisable
    00205d2d   __aeabi_memcpy
    00205d2d   __aeabi_memcpy4
    00205d2d   __aeabi_memcpy8
    00205d2d   memcpy
    00205dc9   __TI_auto_init
    00205ebd   copy_in
    00205f01   C$$EXIT
    00205f05   abort
    00205f0d   exit
    00205f45   Shared_Ram_dataRead_m3
    00205f81   Shared_Ram_dataWrite_m3
    00205fb9   CPUcpsid
    00205fc5   CPUprimask
    00205fcf   CPUcpsie
    00205fdb   CPUwfi
    00205fdb   SysCtlSleep
    00205fdf   CPUbasepriSet
    00205fdf   IntPriorityMaskSet
    00205fe5   CPUbasepriGet
    00205fe5   IntPriorityMaskGet
    00205ff1   _c_int00
    00206025   _args_main
    0020603d   _register_unlock
    00206043   _register_lock
    0020604b   _nop
    00206051   __TI_zero_init
    00206065   Timer0IntHandler
    00206075   __TI_decompress_none
    00206085   SysCtlDelay
    0020608b   __TI_decompress_rle24
    002061f0   m3_r_w_array
    002081f0   __TI_static_base__
    00208200   __TI_Handler_Table_Base
    0020820c   __TI_Handler_Table_Limit
    00208230   __TI_CINIT_Base
    00208258   __TI_CINIT_Limit
    20000000   RamfuncsRunStart
    20000001   FlashInit
    20000057   FlashSetup
    200000bc   RamfuncsRunEnd
    20002000   g_pfnRAMVectors
    20002258   Voltage_M3
    200023e8   __stack
    200024e8   __STACK_END
    200024e8   _lock
    200024ec   _unlock
    200024f0   __TI_cleanup_ptr
    200024f4   __TI_dtors_ptr
    200024f8   i
    200024fc   main_func_sp
    2007f000   AdcValue
    ffffffff   __binit__
    ffffffff   __c_args__
    ffffffff   binit
    UNDEFED    SHT$$INIT_ARRAY$$Base
    UNDEFED    SHT$$INIT_ARRAY$$Limit
    
    [221 symbols]
    
    .

    6. That was my mistake, it says IDLE. I just couldn't see because the highlight line color was similar to the text color.

    >on your project properties look at build configurations, what does it say?

    I don't know what this refers to. I don't see build configurations under the project properties.

  • Mike,

    thanks, sorry it took a while to get back to this.

    I looked at your M3 map file, it looks good. Can you follow below steps and let me know what happens. Also send me you C28x Flash application Map file, the problem could be with C28x as well.

    1.> After you hit the break point at 0x00200030

    2.> Now put a break point in M3 application main() at the line after the function call to send boot mode IPC command to C28x and run. Does it hit the break point?

    3.> while you do have your C28x boot ROM running, it would be running if you started by doing a debug reset on both M3 and C28x and run M3 first and then C28x.

    4.> On C28x, pause the core from running and where is the PC at? is it in your C28x application?

    5.> if yes now run your M3 and step through C28x and see if you see the PWMs?

     

    Best Regards

    Santosh

     

  • Hi Santosh. I've attached the C28 map file.

    ******************************************************************************
                 TMS320C2000 Linker PC v6.2.4                      
    ******************************************************************************
    >> Linked Fri Jan 24 09:43:00 2014
    
    OUTPUT FILE NAME:   <MG C28.out>
    ENTRY POINT SYMBOL: "_c_int00"  address: 0013bd79
    
    
    MEMORY CONFIGURATION
    
             name            origin    length      used     unused   attr    fill
    ----------------------  --------  ---------  --------  --------  ----  --------
    PAGE 0:
      RAML0                 00008000   00001000  0000006a  00000f96  RWIX
      RAML1                 00009000   00001000  00000000  00001000  RWIX
      FLASHN                00100000   00002000  00000000  00002000  RWIX
      FLASHM                00102000   00002000  00000000  00002000  RWIX
      FLASHL                00104000   00002000  00000000  00002000  RWIX
      FLASHK                00106000   00002000  00000000  00002000  RWIX
      FLASHJ                00108000   00008000  00000000  00008000  RWIX
      FLASHI                00110000   00008000  00000000  00008000  RWIX
      FLASHH                00118000   00008000  00000000  00008000  RWIX
      FLASHG                00120000   00008000  00000000  00008000  RWIX
      FLASHF                00128000   00008000  00000000  00008000  RWIX
      FLASHE                00130000   00008000  00000000  00008000  RWIX
      FLASHD                00138000   00002000  0000006a  00001f96  RWIX
      FLASHC                0013a000   00002000  00001fe6  0000001a  RWIX
      FLASHA                0013e000   00001f80  000001bb  00001dc5  RWIX
      CSM_RSVD              0013ff80   00000070  00000000  00000070  RWIX
      BEGIN                 0013fff0   00000002  00000002  00000000  RWIX
      FLASH_EXE_ONLY_P0     0013fff2   00000002  00000000  00000002  RWIX
      ECSL_PWL_P0           0013fff4   00000004  00000000  00000004  RWIX
      CSM_PWL_P0            0013fff8   00000008  00000000  00000008  RWIX
      FPUTABLES             003fd258   000006a0  00000000  000006a0  RWIX
      IQTABLES              003fd8f8   00000b50  00000000  00000b50  RWIX
      IQTABLES2             003fe448   0000008c  00000000  0000008c  RWIX
      IQTABLES3             003fe4d4   000000aa  00000000  000000aa  RWIX
      BOOTROM               003feda8   00001200  00000000  00001200  RWIX
      PIEMISHNDLR           003fffbe   00000002  00000000  00000002  RWIX
      RESET                 003fffc0   00000002  00000000  00000002  RWIX
      VECTORS               003fffc2   0000003e  00000000  0000003e  RWIX
    
    PAGE 1:
      BOOT_RSVD             00000000   00000050  00000000  00000050  RWIX
      RAMM0                 00000050   000003b0  00000300  000000b0  RWIX
      RAMM1                 00000400   00000400  00000190  00000270  RWIX
      DEV_EMU               00000880   00000180  00000042  0000013e  RWIX
      CSM                   00000ae0   00000020  00000016  0000000a  RWIX
      ADC1_RESULT           00000b00   00000020  00000010  00000010  RWIX
      ADC2_RESULT           00000b40   00000020  00000010  00000010  RWIX
      CPU_TIMER0            00000c00   00000008  00000008  00000000  RWIX
      CPU_TIMER1            00000c08   00000008  00000008  00000000  RWIX
      CPU_TIMER2            00000c10   00000008  00000008  00000000  RWIX
      PIE_CTRL              00000ce0   00000020  0000001a  00000006  RWIX
      PIE_VECT              00000d00   00000100  00000100  00000000  RWIX
      PIE_VECT_CP           00000e00   00000100  00000100  00000000  RWIX
      DMA                   00001000   00000200  000000e0  00000120  RWIX
      ASYSCTRLCONFIG        00001700   00000080  00000078  00000008  RWIX
      HWBIST                00001780   00000040  00000030  00000010  RWIX
      FLASH_REGS            00004000   00000300  00000182  0000017e  RWIX
      FLASH_ECC             00004300   00000040  00000024  0000001c  RWIX
      M3PLL                 00004400   00000040  00000008  00000038  RWIX
      RAM_REGS              00004900   00000080  0000003e  00000042  RWIX
      RAM_ERR_REGS          00004a00   00000080  0000003e  00000042  RWIX
      CM_MC_IPC             00004e00   00000040  00000040  00000000  RWIX
      MCBSPA                00005000   00000040  00000024  0000001c  RWIX
      EPWM1                 00005100   00000080  00000080  00000000  RWIX
      EPWM2                 00005180   00000080  00000080  00000000  RWIX
      EPWM3                 00005200   00000080  00000080  00000000  RWIX
      EPWM4                 00005280   00000080  00000080  00000000  RWIX
      EPWM5                 00005300   00000080  00000080  00000000  RWIX
      EPWM6                 00005380   00000080  00000080  00000000  RWIX
      EPWM7                 00005400   00000080  00000080  00000000  RWIX
      EPWM8                 00005480   00000080  00000080  00000000  RWIX
      EPWM9                 00005500   00000080  00000080  00000000  RWIX
      ECAP1                 00005a00   00000020  00000020  00000000  RWIX
      ECAP2                 00005a20   00000020  00000020  00000000  RWIX
      ECAP3                 00005a40   00000020  00000020  00000000  RWIX
      ECAP4                 00005a60   00000020  00000020  00000000  RWIX
      ECAP5                 00005a80   00000020  00000020  00000000  RWIX
      ECAP6                 00005aa0   00000020  00000020  00000000  RWIX
      EQEP1                 00005b00   00000040  00000022  0000001e  RWIX
      EQEP2                 00005b40   00000040  00000022  0000001e  RWIX
      EQEP3                 00005b80   00000040  00000022  0000001e  RWIX
      GPIOG1CTRL            00005f80   00000040  00000040  00000000  RWIX
      GPIOG1DAT             00005fc0   00000020  00000020  00000000  RWIX
      GPIOG1TRIP            00005fe0   00000020  00000020  00000000  RWIX
      COMP1                 00006400   00000020  00000007  00000019  RWIX
      COMP2                 00006420   00000020  00000007  00000019  RWIX
      COMP3                 00006440   00000020  00000007  00000019  RWIX
      COMP4                 00006460   00000020  00000007  00000019  RWIX
      COMP5                 00006480   00000020  00000007  00000019  RWIX
      COMP6                 000064a0   00000020  00000007  00000019  RWIX
      GPIOG2CTRL            00006f80   00000040  0000003c  00000004  RWIX
      GPIOG2DAT             00006fc0   00000020  00000020  00000000  RWIX
      SYSTEM                00007010   00000020  0000001d  00000003  RWIX
      SPIA                  00007040   00000010  00000010  00000000  RWIX
      SCIA                  00007050   00000010  00000010  00000000  RWIX
      NMIINTRUPT            00007060   00000010  00000006  0000000a  RWIX
      XINTRUPT              00007070   00000010  00000010  00000000  RWIX
      ADC1                  00007100   00000080  00000050  00000030  RWIX
      ADC2                  00007180   00000080  00000050  00000030  RWIX
      I2CA                  00007900   00000040  00000022  0000001e  RWIX
      RAML2                 0000a000   00001000  00000450  00000bb0  RWIX
      RAML3                 0000b000   00001000  00000000  00001000  RWIX
      RAMS0                 0000c000   00001000  00001000  00000000  RWIX
      RAMS1                 0000d000   00001000  00000000  00001000  RWIX
      RAMS2                 0000e000   00001000  00001000  00000000  RWIX
      RAMS3                 0000f000   00001000  00000000  00001000  RWIX
      RAMS4                 00010000   00001000  00000000  00001000  RWIX
      RAMS5                 00011000   00001000  00000000  00001000  RWIX
      RAMS6                 00012000   00001000  00000000  00001000  RWIX
      RAMS7                 00013000   00001000  00000000  00001000  RWIX
      CTOMRAM               0003f800   00000380  00000000  00000380  RWIX
      MTOCRAM               0003fc00   00000380  00000000  00000380  RWIX
      FLASHB                0013c000   00002000  00000000  00002000  RWIX
      FLASH_EXE_ONLY        0013fff2   00000002  00000002  00000000  RWIX
      ECSL_PWL              0013fff4   00000004  00000004  00000000  RWIX
      CSM_PWL               0013fff8   00000008  00000008  00000000  RWIX
    
    
    SECTION ALLOCATION MAP
    
     output                                  attributes/
    section   page    origin      length       input sections
    --------  ----  ----------  ----------   ----------------
    GETBUFFER 
    *          0    0003fc00    00000000     DSECT
    
    GETWRITEIDX 
    *          0    0003fc00    00000000     DSECT
    
    PUTREADIDX 
    *          0    0003fc00    00000000     DSECT
    
    ramfuncs   0    00138000    0000006a     RUN ADDR = 00008000
                      00138000    00000066     SystemControl.obj (ramfuncs)
                      00138066    00000004     F28M35x_usDelay.obj (ramfuncs)
    
    .text      0    0013a000    00001fe6     
                      0013a000    000004b0     ThreePhase.obj (.text)
                      0013a4b0    00000407     F28M35x_Adc.obj (.text)
                      0013a8b7    0000035f     F28M35x_DefaultIsr.obj (.text:retain)
                      0013ac16    000001e9     SVM.obj (.text)
                      0013adff    000001da     PWM.obj (.text)
                      0013afd9    000001d5     rts2800_fpu32.lib : memory.obj (.text)
                      0013b1ae    0000016b     ADC.obj (.text)
                      0013b319    00000168     Observer.obj (.text)
                      0013b481    00000168     ADCMeasurements.obj (.text:retain)
                      0013b5e9    0000010c     ControlCore.obj (.text)
                      0013b6f5    0000010c     FieldOriented.obj (.text)
                      0013b801    000000f0     Angle.obj (.text)
                      0013b8f1    000000af     Vpf.obj (.text)
                      0013b9a0    0000008d     MG C28.obj (.text)
                      0013ba2d    0000008a     SystemControl.obj (.text)
                      0013bab7    00000088     rts2800_fpu32.lib : fs_div.obj (.text)
                      0013bb3f    0000007c     F28M35x_CpuTimers.obj (.text)
                      0013bbbb    00000063     XY.obj (.text)
                      0013bc1e    00000061     rts2800_fpu32.lib : cos.obj (.text)
                      0013bc7f    00000058                       : sin.obj (.text)
                      0013bcd7    00000054     DCBus.obj (.text)
                      0013bd2b    0000004e     GPIOConfig.obj (.text)
                      0013bd79    00000046     rts2800_fpu32.lib : boot.obj (.text)
                      0013bdbf    00000041     StateMachine.obj (.text)
                      0013be00    00000038     MG C28.obj (.text:retain)
                      0013be38    0000002d     F28M35x_PieCtrl.obj (.text)
                      0013be65    00000001     rts2800_fpu32.lib : newhandler.obj (.text)
                      0013be66    00000023                       : sqrt.obj (.text)
                      0013be89    00000021                       : memcpy_ff.obj (.text)
                      0013beaa    00000020     F28M35x_PieVect.obj (.text)
                      0013beca    00000020     rts2800_fpu32.lib : new_.obj (.text)
                      0013beea    0000001a     Run.obj (.text)
                      0013bf04    0000001a     rts2800_fpu32.lib : modf.obj (.text)
                      0013bf1e    00000019                       : args_main.obj (.text)
                      0013bf37    00000019                       : exit.obj (.text)
                      0013bf50    00000011     ADCMeasurements.obj (.text)
                      0013bf61    00000010     Charge.obj (.text)
                      0013bf71    00000010     DeadStart.obj (.text)
                      0013bf81    00000010     FaultState.obj (.text)
                      0013bf91    00000010     HighIdle.obj (.text)
                      0013bfa1    00000010     LowIdle.obj (.text)
                      0013bfb1    00000010     SteadyState.obj (.text)
                      0013bfc1    00000010     Sync.obj (.text)
                      0013bfd1    0000000c     Init.obj (.text)
                      0013bfdd    00000009     rts2800_fpu32.lib : _lock.obj (.text)
    
    .econst    0    0013e000    00000106     
                      0013e000    00000100     F28M35x_PieVect.obj (.econst)
                      0013e100    00000006     Vpf.obj (.econst)
    
    .cinit     0    0013e106    000000ab     
                      0013e106    00000043     StateTransitions.obj (.cinit)
                      0013e149    0000001e     Vpf.obj (.cinit)
                      0013e167    00000019     Observer.obj (.cinit)
                      0013e180    0000000a     DCBus.obj (.cinit)
                      0013e18a    0000000a     rts2800_fpu32.lib : _lock.obj (.cinit)
                      0013e194    0000000a                       : exit.obj (.cinit)
                      0013e19e    00000005                       : vars.obj (.cinit)
                      0013e1a3    00000004     MG C28.obj (.cinit)
                      0013e1a7    00000004     rts2800_fpu32.lib : errno.obj (.cinit)
                      0013e1ab    00000004                       : memory.obj (.cinit)
                      0013e1af    00000002     --HOLE-- [fill = 0]
    
    .pinit     0    0013e1b2    0000000a     
                      0013e1b2    00000002     ADCMeasurements.obj (.pinit)
                      0013e1b4    00000002     ControlCore.obj (.pinit)
                      0013e1b6    00000002     DCBus.obj (.pinit)
                      0013e1b8    00000002     PWM.obj (.pinit)
                      0013e1ba    00000002     --HOLE-- [fill = 0]
    
    codestart 
    *          0    0013fff0    00000002     
                      0013fff0    00000002     F28M35x_CodeStartBranch.obj (codestart)
    
    .reset     0    003fffc0    00000002     DSECT
                      003fffc0    00000002     rts2800_fpu32.lib : boot.obj (.reset)
    
    vectors    0    003fffc2    00000000     DSECT
    
    .stack     1    00000050    00000300     UNINITIALIZED
                      00000050    00000300     --HOLE--
    
    .sysmem    1    00000400    00000190     UNINITIALIZED
                      00000400    00000001     rts2800_fpu32.lib : memory.obj (.sysmem)
                      00000401    0000018f     --HOLE--
    
    DevEmuRegsFile 
    *          1    00000880    00000042     UNINITIALIZED
                      00000880    00000042     F28M35x_GlobalVariableDefs.obj (DevEmuRegsFile)
    
    CsmRegsFile 
    *          1    00000ae0    00000016     UNINITIALIZED
                      00000ae0    00000016     F28M35x_GlobalVariableDefs.obj (CsmRegsFile)
    
    AdcResultFile 
    *          1    00000b00    00000010     UNINITIALIZED
                      00000b00    00000010     F28M35x_GlobalVariableDefs.obj (AdcResultFile)
    
    Adc1ResultFile 
    *          1    00000b00    00000010     UNINITIALIZED
                      00000b00    00000010     F28M35x_GlobalVariableDefs.obj (Adc1ResultFile)
    
    Adc2ResultFile 
    *          1    00000b40    00000010     UNINITIALIZED
                      00000b40    00000010     F28M35x_GlobalVariableDefs.obj (Adc2ResultFile)
    
    CpuTimer0RegsFile 
    *          1    00000c00    00000008     UNINITIALIZED
                      00000c00    00000008     F28M35x_GlobalVariableDefs.obj (CpuTimer0RegsFile)
    
    CpuTimer1RegsFile 
    *          1    00000c08    00000008     UNINITIALIZED
                      00000c08    00000008     F28M35x_GlobalVariableDefs.obj (CpuTimer1RegsFile)
    
    CpuTimer2RegsFile 
    *          1    00000c10    00000008     UNINITIALIZED
                      00000c10    00000008     F28M35x_GlobalVariableDefs.obj (CpuTimer2RegsFile)
    
    PieCtrlRegsFile 
    *          1    00000ce0    0000001a     UNINITIALIZED
                      00000ce0    0000001a     F28M35x_GlobalVariableDefs.obj (PieCtrlRegsFile)
    
    PieVectTableFile 
    *          1    00000d00    00000100     UNINITIALIZED
                      00000d00    00000100     F28M35x_GlobalVariableDefs.obj (PieVectTableFile)
    
    EmuKeyVar 
    *          1    00000d00    00000000     UNINITIALIZED
    
    EmuBModeVar 
    *          1    00000d00    00000000     UNINITIALIZED
    
    FlashCallbackVar 
    *          1    00000d00    00000000     UNINITIALIZED
    
    FlashScalingVar 
    *          1    00000d00    00000000     UNINITIALIZED
    
    PieVectTableCopyFile 
    *          1    00000e00    00000100     UNINITIALIZED
                      00000e00    00000100     F28M35x_GlobalVariableDefs.obj (PieVectTableCopyFile)
    
    DmaRegsFile 
    *          1    00001000    000000e0     UNINITIALIZED
                      00001000    000000e0     F28M35x_GlobalVariableDefs.obj (DmaRegsFile)
    
    AnalogSysctrlRegsFile 
    *          1    00001700    00000078     UNINITIALIZED
                      00001700    00000078     F28M35x_GlobalVariableDefs.obj (AnalogSysctrlRegsFile)
    
    HWBistRegsFile 
    *          1    00001780    00000030     UNINITIALIZED
                      00001780    00000030     F28M35x_GlobalVariableDefs.obj (HWBistRegsFile)
    
    FlashCtrlRegsFile 
    *          1    00004000    00000182     UNINITIALIZED
                      00004000    00000182     F28M35x_GlobalVariableDefs.obj (FlashCtrlRegsFile)
    
    FlashEccRegsFile 
    *          1    00004300    00000024     UNINITIALIZED
                      00004300    00000024     F28M35x_GlobalVariableDefs.obj (FlashEccRegsFile)
    
    M3PllRegsFile 
    *          1    00004400    00000008     UNINITIALIZED
                      00004400    00000008     F28M35x_GlobalVariableDefs.obj (M3PllRegsFile)
    
    RAMRegsFile 
    *          1    00004900    0000003e     UNINITIALIZED
                      00004900    0000003e     F28M35x_GlobalVariableDefs.obj (RAMRegsFile)
    
    RAMErrRegsFile 
    *          1    00004a00    0000003e     UNINITIALIZED
                      00004a00    0000003e     F28M35x_GlobalVariableDefs.obj (RAMErrRegsFile)
    
    CtoMIpcRegsFile 
    *          1    00004e00    00000040     UNINITIALIZED
                      00004e00    00000040     F28M35x_GlobalVariableDefs.obj (CtoMIpcRegsFile)
    
    McbspaRegsFile 
    *          1    00005000    00000024     UNINITIALIZED
                      00005000    00000024     F28M35x_GlobalVariableDefs.obj (McbspaRegsFile)
    
    EPwm1RegsFile 
    *          1    00005100    00000080     UNINITIALIZED
                      00005100    00000080     F28M35x_GlobalVariableDefs.obj (EPwm1RegsFile)
    
    EPwm2RegsFile 
    *          1    00005180    00000080     UNINITIALIZED
                      00005180    00000080     F28M35x_GlobalVariableDefs.obj (EPwm2RegsFile)
    
    EPwm3RegsFile 
    *          1    00005200    00000080     UNINITIALIZED
                      00005200    00000080     F28M35x_GlobalVariableDefs.obj (EPwm3RegsFile)
    
    EPwm4RegsFile 
    *          1    00005280    00000080     UNINITIALIZED
                      00005280    00000080     F28M35x_GlobalVariableDefs.obj (EPwm4RegsFile)
    
    EPwm5RegsFile 
    *          1    00005300    00000080     UNINITIALIZED
                      00005300    00000080     F28M35x_GlobalVariableDefs.obj (EPwm5RegsFile)
    
    EPwm6RegsFile 
    *          1    00005380    00000080     UNINITIALIZED
                      00005380    00000080     F28M35x_GlobalVariableDefs.obj (EPwm6RegsFile)
    
    EPwm7RegsFile 
    *          1    00005400    00000080     UNINITIALIZED
                      00005400    00000080     F28M35x_GlobalVariableDefs.obj (EPwm7RegsFile)
    
    EPwm8RegsFile 
    *          1    00005480    00000080     UNINITIALIZED
                      00005480    00000080     F28M35x_GlobalVariableDefs.obj (EPwm8RegsFile)
    
    EPwm9RegsFile 
    *          1    00005500    00000080     UNINITIALIZED
                      00005500    00000080     F28M35x_GlobalVariableDefs.obj (EPwm9RegsFile)
    
    ECap1RegsFile 
    *          1    00005a00    00000020     UNINITIALIZED
                      00005a00    00000020     F28M35x_GlobalVariableDefs.obj (ECap1RegsFile)
    
    ECap2RegsFile 
    *          1    00005a20    00000020     UNINITIALIZED
                      00005a20    00000020     F28M35x_GlobalVariableDefs.obj (ECap2RegsFile)
    
    ECap3RegsFile 
    *          1    00005a40    00000020     UNINITIALIZED
                      00005a40    00000020     F28M35x_GlobalVariableDefs.obj (ECap3RegsFile)
    
    ECap4RegsFile 
    *          1    00005a60    00000020     UNINITIALIZED
                      00005a60    00000020     F28M35x_GlobalVariableDefs.obj (ECap4RegsFile)
    
    ECap5RegsFile 
    *          1    00005a80    00000020     UNINITIALIZED
                      00005a80    00000020     F28M35x_GlobalVariableDefs.obj (ECap5RegsFile)
    
    ECap6RegsFile 
    *          1    00005aa0    00000020     UNINITIALIZED
                      00005aa0    00000020     F28M35x_GlobalVariableDefs.obj (ECap6RegsFile)
    
    EQep1RegsFile 
    *          1    00005b00    00000022     UNINITIALIZED
                      00005b00    00000022     F28M35x_GlobalVariableDefs.obj (EQep1RegsFile)
    
    EQep2RegsFile 
    *          1    00005b40    00000022     UNINITIALIZED
                      00005b40    00000022     F28M35x_GlobalVariableDefs.obj (EQep2RegsFile)
    
    EQep3RegsFile 
    *          1    00005b80    00000022     UNINITIALIZED
                      00005b80    00000022     F28M35x_GlobalVariableDefs.obj (EQep3RegsFile)
    
    GpioCtrlRegsFile 
    *          1    00005f80    00000040     UNINITIALIZED
                      00005f80    00000040     F28M35x_GlobalVariableDefs.obj (GpioCtrlRegsFile)
    
    GpioG1CtrlRegsFile 
    *          1    00005f80    00000040     UNINITIALIZED
                      00005f80    00000040     F28M35x_GlobalVariableDefs.obj (GpioG1CtrlRegsFile)
    
    GpioDataRegsFile 
    *          1    00005fc0    00000020     UNINITIALIZED
                      00005fc0    00000020     F28M35x_GlobalVariableDefs.obj (GpioDataRegsFile)
    
    GpioG1DataRegsFile 
    *          1    00005fc0    00000020     UNINITIALIZED
                      00005fc0    00000020     F28M35x_GlobalVariableDefs.obj (GpioG1DataRegsFile)
    
    GpioTripRegsFile 
    *          1    00005fe0    00000020     UNINITIALIZED
                      00005fe0    00000020     F28M35x_GlobalVariableDefs.obj (GpioTripRegsFile)
    
    GpioG1TripRegsFile 
    *          1    00005fe0    00000020     UNINITIALIZED
                      00005fe0    00000020     F28M35x_GlobalVariableDefs.obj (GpioG1TripRegsFile)
    
    Comp1RegsFile 
    *          1    00006400    00000007     UNINITIALIZED
                      00006400    00000007     F28M35x_GlobalVariableDefs.obj (Comp1RegsFile)
    
    Comp2RegsFile 
    *          1    00006420    00000007     UNINITIALIZED
                      00006420    00000007     F28M35x_GlobalVariableDefs.obj (Comp2RegsFile)
    
    Comp3RegsFile 
    *          1    00006440    00000007     UNINITIALIZED
                      00006440    00000007     F28M35x_GlobalVariableDefs.obj (Comp3RegsFile)
    
    Comp4RegsFile 
    *          1    00006460    00000007     UNINITIALIZED
                      00006460    00000007     F28M35x_GlobalVariableDefs.obj (Comp4RegsFile)
    
    Comp5RegsFile 
    *          1    00006480    00000007     UNINITIALIZED
                      00006480    00000007     F28M35x_GlobalVariableDefs.obj (Comp5RegsFile)
    
    Comp6RegsFile 
    *          1    000064a0    00000007     UNINITIALIZED
                      000064a0    00000007     F28M35x_GlobalVariableDefs.obj (Comp6RegsFile)
    
    GpioG2CtrlRegsFile 
    *          1    00006f80    0000003c     UNINITIALIZED
                      00006f80    0000003c     F28M35x_GlobalVariableDefs.obj (GpioG2CtrlRegsFile)
    
    GpioG2DataRegsFile 
    *          1    00006fc0    00000020     UNINITIALIZED
                      00006fc0    00000020     F28M35x_GlobalVariableDefs.obj (GpioG2DataRegsFile)
    
    SysCtrlRegsFile 
    *          1    00007010    0000001d     UNINITIALIZED
                      00007010    0000001d     F28M35x_GlobalVariableDefs.obj (SysCtrlRegsFile)
    
    SpiaRegsFile 
    *          1    00007040    00000010     UNINITIALIZED
                      00007040    00000010     F28M35x_GlobalVariableDefs.obj (SpiaRegsFile)
    
    SciaRegsFile 
    *          1    00007050    00000010     UNINITIALIZED
                      00007050    00000010     F28M35x_GlobalVariableDefs.obj (SciaRegsFile)
    
    NmiIntruptRegsFile 
    *          1    00007060    00000006     UNINITIALIZED
                      00007060    00000006     F28M35x_GlobalVariableDefs.obj (NmiIntruptRegsFile)
    
    XIntruptRegsFile 
    *          1    00007070    00000010     UNINITIALIZED
                      00007070    00000010     F28M35x_GlobalVariableDefs.obj (XIntruptRegsFile)
    
    AdcRegsFile 
    *          1    00007100    00000050     UNINITIALIZED
                      00007100    00000050     F28M35x_GlobalVariableDefs.obj (AdcRegsFile)
    
    Adc1RegsFile 
    *          1    00007100    00000050     UNINITIALIZED
                      00007100    00000050     F28M35x_GlobalVariableDefs.obj (Adc1RegsFile)
    
    Adc2RegsFile 
    *          1    00007180    00000050     UNINITIALIZED
                      00007180    00000050     F28M35x_GlobalVariableDefs.obj (Adc2RegsFile)
    
    I2caRegsFile 
    *          1    00007900    00000022     UNINITIALIZED
                      00007900    00000022     F28M35x_GlobalVariableDefs.obj (I2caRegsFile)
    
    .ebss      1    0000a000    00000450     UNINITIALIZED
                      0000a000    00000360     MG C28.obj (.ebss)
                      0000a360    0000001a     ADCMeasurements.obj (.ebss)
                      0000a37a    00000004     rts2800_fpu32.lib : _lock.obj (.ebss)
                      0000a37e    00000002                       : vars.obj (.ebss)
                      0000a380    00000040     StateTransitions.obj (.ebss)
                      0000a3c0    0000003c     ControlCore.obj (.ebss)
                      0000a3fc    00000004     rts2800_fpu32.lib : exit.obj (.ebss)
                      0000a400    00000018     F28M35x_CpuTimers.obj (.ebss)
                      0000a418    0000000c     PWM.obj (.ebss)
                      0000a424    0000000c     Vpf.obj (.ebss)
                      0000a430    0000000a     Observer.obj (.ebss)
                      0000a43a    00000001     StateMachine.obj (.ebss)
                      0000a43b    00000001     rts2800_fpu32.lib : errno.obj (.ebss)
                      0000a43c    00000004     --HOLE--
                      0000a440    00000008     DCBus.obj (.ebss)
                      0000a448    00000008     rts2800_fpu32.lib : memory.obj (.ebss)
    
    SHARERAMS0 
    *          1    0000c000    00001000     UNINITIALIZED
                      0000c000    00001000     MG C28.obj (SHARERAMS0)
    
    SHARERAMS2 
    *          1    0000e000    00001000     UNINITIALIZED
                      0000e000    00001000     MG C28.obj (SHARERAMS2)
    
    FlashExeOnlyFile 
    *          1    0013fff2    00000002     UNINITIALIZED
                      0013fff2    00000002     F28M35x_GlobalVariableDefs.obj (FlashExeOnlyFile)
    
    EcslPwlFile 
    *          1    0013fff4    00000004     UNINITIALIZED
                      0013fff4    00000004     F28M35x_GlobalVariableDefs.obj (EcslPwlFile)
    
    CsmPwlFile 
    *          1    0013fff8    00000008     UNINITIALIZED
                      0013fff8    00000008     F28M35x_GlobalVariableDefs.obj (CsmPwlFile)
    
    
    GLOBAL DATA SYMBOLS: SORTED BY DATA PAGE
    
    address     data page           name
    --------    ----------------    ----
    00000050       1 (00000040)     __stack
    
    00000400      10 (00000400)     __sys_memory
    
    00000880      22 (00000880)     _DevEmuRegs
    
    00000ae0      2b (00000ac0)     _CsmRegs
    
    00000b00      2c (00000b00)     _Adc1Result
    00000b00      2c (00000b00)     _AdcResult
    
    00000b40      2d (00000b40)     _Adc2Result
    
    00000c00      30 (00000c00)     _CpuTimer0Regs
    00000c08      30 (00000c00)     _CpuTimer1Regs
    00000c10      30 (00000c00)     _CpuTimer2Regs
    
    00000ce0      33 (00000cc0)     _PieCtrlRegs
    
    00000d00      34 (00000d00)     _PieVectTable
    
    00000e00      38 (00000e00)     _PieVectTableCopy
    
    00001000      40 (00001000)     _DmaRegs
    
    00001700      5c (00001700)     _AnalogSysctrlRegs
    
    00001780      5e (00001780)     _HWBistRegs
    
    00004000     100 (00004000)     _FlashCtrlRegs
    
    00004300     10c (00004300)     _FlashEccRegs
    
    00004400     110 (00004400)     _M3PllRegs
    
    00004900     124 (00004900)     _RAMRegs
    
    00004a00     128 (00004a00)     _RAMErrRegs
    
    00004e00     138 (00004e00)     _CtoMIpcRegs
    
    00005000     140 (00005000)     _McbspaRegs
    
    00005100     144 (00005100)     _EPwm1Regs
    
    00005180     146 (00005180)     _EPwm2Regs
    
    00005200     148 (00005200)     _EPwm3Regs
    
    00005280     14a (00005280)     _EPwm4Regs
    
    00005300     14c (00005300)     _EPwm5Regs
    
    00005380     14e (00005380)     _EPwm6Regs
    
    00005400     150 (00005400)     _EPwm7Regs
    
    00005480     152 (00005480)     _EPwm8Regs
    
    00005500     154 (00005500)     _EPwm9Regs
    
    00005a00     168 (00005a00)     _ECap1Regs
    00005a20     168 (00005a00)     _ECap2Regs
    
    00005a40     169 (00005a40)     _ECap3Regs
    00005a60     169 (00005a40)     _ECap4Regs
    
    00005a80     16a (00005a80)     _ECap5Regs
    00005aa0     16a (00005a80)     _ECap6Regs
    
    00005b00     16c (00005b00)     _EQep1Regs
    
    00005b40     16d (00005b40)     _EQep2Regs
    
    00005b80     16e (00005b80)     _EQep3Regs
    
    00005f80     17e (00005f80)     _GpioCtrlRegs
    00005f80     17e (00005f80)     _GpioG1CtrlRegs
    
    00005fc0     17f (00005fc0)     _GpioDataRegs
    00005fc0     17f (00005fc0)     _GpioG1DataRegs
    00005fe0     17f (00005fc0)     _GpioG1TripRegs
    00005fe0     17f (00005fc0)     _GpioTripRegs
    
    00006400     190 (00006400)     _Comp1Regs
    00006420     190 (00006400)     _Comp2Regs
    
    00006440     191 (00006440)     _Comp3Regs
    00006460     191 (00006440)     _Comp4Regs
    
    00006480     192 (00006480)     _Comp5Regs
    000064a0     192 (00006480)     _Comp6Regs
    
    00006f80     1be (00006f80)     _GpioG2CtrlRegs
    
    00006fc0     1bf (00006fc0)     _GpioG2DataRegs
    
    00007010     1c0 (00007000)     _SysCtrlRegs
    
    00007040     1c1 (00007040)     _SpiaRegs
    00007050     1c1 (00007040)     _SciaRegs
    00007060     1c1 (00007040)     _NmiIntruptRegs
    00007070     1c1 (00007040)     _XIntruptRegs
    
    00007100     1c4 (00007100)     _Adc1Regs
    00007100     1c4 (00007100)     _AdcRegs
    
    00007180     1c6 (00007180)     _Adc2Regs
    
    00007900     1e4 (00007900)     _I2caRegs
    
    0000a000     280 (0000a000)     _ConversionCount
    
    0000a040     281 (0000a040)     _ILHist
    
    0000a360     28d (0000a340)     _DCBus
    0000a362     28d (0000a340)     _IM
    0000a368     28d (0000a340)     _IL
    0000a36e     28d (0000a340)     _VM
    0000a374     28d (0000a340)     _VL
    0000a37a     28d (0000a340)     __unlock
    0000a37c     28d (0000a340)     __lock
    0000a37e     28d (0000a340)     __new_handler
    
    0000a380     28e (0000a380)     _stateHandlers
    
    0000a3fc     28f (0000a3c0)     ___TI_cleanup_ptr
    0000a3fe     28f (0000a3c0)     ___TI_dtors_ptr
    
    0000a400     290 (0000a400)     _CpuTimer1
    0000a408     290 (0000a400)     _CpuTimer2
    0000a410     290 (0000a400)     _CpuTimer0
    0000a418     290 (0000a400)     _LineSide__3PWM
    0000a41e     290 (0000a400)     _MotorSide__3PWM
    0000a43a     290 (0000a400)     _CurrentState
    0000a43b     290 (0000a400)     _errno
    
    0000a440     291 (0000a440)     _InvDCBusVoltage
    0000a442     291 (0000a440)     _DCBusVoltage
    0000a444     291 (0000a440)     _DCBusFilter
    
    0000c000     300 (0000c000)     _c28_r_w_array
    
    0000e000     380 (0000e000)     _c28_r_array
    
    0013e000    4f80 (0013e000)     _PieVectTableInit
    
    0013fff2    4fff (0013ffc0)     _FlashExeOnly
    0013fff4    4fff (0013ffc0)     _EcslPwl
    0013fff8    4fff (0013ffc0)     _CsmPwl
    
    
    GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name 
    
    address    name
    --------   ----
    0013a000   .text
    0013bf37   C$$EXIT
    0013bab7   FS$$DIV
    0013a975   _ADCINT1_ISR
    0013a97f   _ADCINT2_ISR
    0013ab4b   _ADCINT3_ISR
    0013ab55   _ADCINT4_ISR
    0013ab5f   _ADCINT5_ISR
    0013ab69   _ADCINT6_ISR
    0013ab73   _ADCINT7_ISR
    0013ab7d   _ADCINT8_ISR
    0013b481   _ADCLineSide__Fv
    0013b535   _ADCMotorSide__Fv
    0013a50d   _Adc1ChanSelect
    0013a582   _Adc1Conversion
    0013a4e6   _Adc1OffsetSelfCal
    00007100   _Adc1Regs
    00000b00   _Adc1Result
    0013a71b   _Adc2ChanSelect
    0013a790   _Adc2Conversion
    0013a6f4   _Adc2OffsetSelfCal
    00007180   _Adc2Regs
    00000b40   _Adc2Result
    0013a6b2   _AdcChanSelect
    0013a6b8   _AdcConversion
    0013a6af   _AdcOffsetSelfCal
    00007100   _AdcRegs
    00000b00   _AdcResult
    00001700   _AnalogSysctrlRegs
    0013abc3   _CFLFSM_ISR
    0013abb9   _CFLSINGERR_ISR
    0013abd7   _CRAMACCVIOL_ISR
    0013abcd   _CRAMSINGERR_ISR
    0013ba9f   _CSMSecurityStatus
    0013bdbf   _ChangeState__F5State
    0013b8f1   _ChangeVoltsPerHertz__Ff
    0013bf6e   _ChargeAction__Fv
    0013bf6f   _ChargeEnter__Fv
    0013bf61   _ChargeEventHandler__F12StateMessage
    0013bf70   _ChargeExit__Fv
    00006400   _Comp1Regs
    00006420   _Comp2Regs
    00006440   _Comp3Regs
    00006460   _Comp4Regs
    00006480   _Comp5Regs
    000064a0   _Comp6Regs
    0013bb80   _ConfigCpuTimer
    0013b201   _ConfigureADCINT__FPV13INTSEL1N2_REG12INTSELECTIONUi
    0013b23c   _ConfigureADC__Fv
    0013bd2b   _ConfigureFaultPins
    0013ae4c   _ConfigureLinePWM__3PWMSFv
    0013ae8b   _ConfigureMotorPWM__3PWMSFv
    0013adff   _ConfigurePWMReg__FPV9EPWM_REGS
    0013b1c9   _ConfigurePWMSOC__FPV9EPWM_REGS3SOCUiT3
    0013b1ae   _ConfigureSOC__FPV14ADCSOCxCTL_REG7Channel7Trigger
    0013adcc   _ConfigureSVM_EPWM__Fv
    0013b227   _ConfigureSimultaneous__Fv
    0013b997   _ConfigureTimestep__Ff
    0000a000   _ConversionCount
    0000a410   _CpuTimer0
    00000c00   _CpuTimer0Regs
    0000a400   _CpuTimer1
    00000c08   _CpuTimer1Regs
    0000a408   _CpuTimer2
    00000c10   _CpuTimer2Regs
    0013fff8   _CsmPwl
    00000ae0   _CsmRegs
    0013ba4d   _CsmUnlock
    00004e00   _CtoMIpcRegs
    0013b7cb   _CurrentControl__20FieldOrientedControlF2PQ3DQO
    0000a43a   _CurrentState
    0013a8cb   _DATALOG_ISR
    0000a360   _DCBus
    0000a444   _DCBusFilter
    0000a442   _DCBusVoltage
    0013aae7   _DINTCH1_ISR
    0013aaf1   _DINTCH2_ISR
    0013aafb   _DINTCH3_ISR
    0013ab05   _DINTCH4_ISR
    0013ab0f   _DINTCH5_ISR
    0013ab19   _DINTCH6_ISR
    0013a0c8   _DQFromAB__F3ABO5Angle
    00008066   _DSP28x_usDelay
    0013bf7e   _DeadStartAction__Fv
    0013bf7f   _DeadStartEnter__Fv
    0013bf71   _DeadStartEventHandler__F12StateMessage
    0013bf80   _DeadStartExit__Fv
    0013ac16   _DetermineSector__FfN21
    00000880   _DevEmuRegs
    00001000   _DmaRegs
    0013aa51   _ECAP1_INT_ISR
    0013aa5b   _ECAP2_INT_ISR
    0013aa65   _ECAP3_INT_ISR
    0013aa6f   _ECAP4_INT_ISR
    0013aa79   _ECAP5_INT_ISR
    0013aa83   _ECAP6_INT_ISR
    0013baab   _ECSLSecurityStatus
    00005a00   _ECap1Regs
    00005a20   _ECap2Regs
    00005a40   _ECap3Regs
    00005a60   _ECap4Regs
    00005a80   _ECap5Regs
    00005aa0   _ECap6Regs
    0013abf5   _EMPTY_ISR
    0013a8df   _EMUINT_ISR
    0013aa01   _EPWM1_INT_ISR
    0013a9b1   _EPWM1_TZINT_ISR
    0013aa0b   _EPWM2_INT_ISR
    0013a9bb   _EPWM2_TZINT_ISR
    0013aa15   _EPWM3_INT_ISR
    0013a9c5   _EPWM3_TZINT_ISR
    0013aa1f   _EPWM4_INT_ISR
    0013a9cf   _EPWM4_TZINT_ISR
    0013aa29   _EPWM5_INT_ISR
    0013a9d9   _EPWM5_TZINT_ISR
    0013aa33   _EPWM6_INT_ISR
    0013a9e3   _EPWM6_TZINT_ISR
    0013aa3d   _EPWM7_INT_ISR
    0013a9ed   _EPWM7_TZINT_ISR
    0013aa47   _EPWM8_INT_ISR
    0013a9f7   _EPWM8_TZINT_ISR
    0013aab5   _EPWM9_INT_ISR
    0013aa8d   _EPWM9_TZINT_ISR
    00005100   _EPwm1Regs
    00005180   _EPwm2Regs
    00005200   _EPwm3Regs
    00005280   _EPwm4Regs
    00005300   _EPwm5Regs
    00005380   _EPwm6Regs
    00005400   _EPwm7Regs
    00005480   _EPwm8Regs
    00005500   _EPwm9Regs
    0013aa97   _EQEP1_INT_ISR
    0013aaa1   _EQEP2_INT_ISR
    0013aaab   _EQEP3_INT_ISR
    00005b00   _EQep1Regs
    00005b40   _EQep2Regs
    00005b80   _EQep3Regs
    0013fff4   _EcslPwl
    0013ba6e   _EcslUnlock
    0013be5c   _EnableInterrupts
    0013bf8a   _FaultAction__Fv
    0013bf8b   _FaultEnter__Fv
    0013bf81   _FaultEventHandler__F12StateMessage
    0013bf90   _FaultExit__Fv
    00004000   _FlashCtrlRegs
    00004300   _FlashEccRegs
    0013fff2   _FlashExeOnly
    0000804e   _FlashGainPump
    0000805b   _FlashLeavePump
    0013af40   _ForceOff__3PWMFv
    0013ba8d   _GetEXEstatus
    0013b3c4   _GetSpeed__Fv
    00005f80   _GpioCtrlRegs
    00005fc0   _GpioDataRegs
    00005f80   _GpioG1CtrlRegs
    00005fc0   _GpioG1DataRegs
    00005fe0   _GpioG1TripRegs
    00006f80   _GpioG2CtrlRegs
    00006fc0   _GpioG2DataRegs
    00005fe0   _GpioTripRegs
    00001780   _HWBistRegs
    0013bf9e   _HighIdleAction__Fv
    0013bf9f   _HighIdleEnter__Fv
    0013bf91   _HighIdleEventHandler__F12StateMessage
    0013bfa0   _HighIdleExit__Fv
    0013ab23   _I2CINT1A_ISR
    0013ab2d   _I2CINT2A_ISR
    00007900   _I2caRegs
    0000a368   _IL
    0000a040   _ILHist
    0013a8f3   _ILLEGAL_ISR
    0000a362   _IM
    0013a8b7   _INT13_ISR
    0013a8c1   _INT14_ISR
    0013b2ef   _InitADCClocks__Fv
    0013bfda   _InitAction__Fv
    0013a6a9   _InitAdc
    0013a4b0   _InitAdc1
    0013a4c4   _InitAdc1Aio
    0013a6be   _InitAdc2
    0013a6d2   _InitAdc2Aio
    0013a6ac   _InitAdcAio
    0013bb3f   _InitCpuTimers
    0013bfdb   _InitEnter__Fv
    0013bfd1   _InitEventHandler__F12StateMessage
    0013bfdc   _InitExit__Fv
    00008000   _InitFlash
    0013ba2d   _InitPeripheralClocks
    0013be38   _InitPieCtrl
    0013beaa   _InitPieVectTable
    0000a440   _InvDCBusVoltage
    0013abeb   _LUF_ISR
    0013abe1   _LVF_ISR
    0000a418   _LineSide__3PWM
    0013b680   _LineSide__F2PQ10ThreePhaseT2
    0013ba85   _LockDevice
    0013bfae   _LowIdleAction__Fv
    0013bfaf   _LowIdleEnter__Fv
    0013bfa1   _LowIdleEventHandler__F12StateMessage
    0013bfb0   _LowIdleExit__Fv
    00004400   _M3PllRegs
    0013aad3   _MRINTA_ISR
    0013ab87   _MTOCIPC_INT1_ISR
    0013ab91   _MTOCIPC_INT2_ISR
    0013ab9b   _MTOCIPC_INT3_ISR
    0013aba5   _MTOCIPC_INT4_ISR
    0013aadd   _MXINTA_ISR
    00005000   _McbspaRegs
    0000a41e   _MotorSide__3PWM
    0013b642   _MotorSide__F10ThreePhaseT1f
    0013a8e9   _NMI_ISR
    00007060   _NmiIntruptRegs
    0013ac02   _PIE_RESERVED
    00000ce0   _PieCtrlRegs
    00000d00   _PieVectTable
    00000e00   _PieVectTableCopy
    0013e000   _PieVectTableInit
    00004a00   _RAMErrRegs
    00004900   _RAMRegs
    0013a8d5   _RTOSINT_ISR
    0013806a   _RamfuncsLoadEnd
    0000006a   _RamfuncsLoadSize
    00138000   _RamfuncsLoadStart
    0000806a   _RamfuncsRunEnd
    0000006a   _RamfuncsRunSize
    00008000   _RamfuncsRunStart
    0013bef7   _RunAction__Fv
    0013befa   _RunEnter__Fv
    0013beea   _RunEventHandler__F12StateMessage
    0013beff   _RunExit__Fv
    0013ab37   _SCIRXINTA_ISR
    0013ab41   _SCITXINTA_ISR
    0013bdf0   _SMachineAction__Fv
    0013bdfc   _SMachineInit__Fv
    0013bddb   _SMachineNotifyEvent__F12StateMessage
    0013aabf   _SPIRXINTA_ISR
    0013aac9   _SPITXINTA_ISR
    0013ad0d   _SVM__FfN21
    00007050   _SciaRegs
    0013ac4a   _SetEPWM__FUiT1fN23
    0013b903   _SetHertz__Ff
    0013aeca   _SetVoltages__3PWMF10ThreePhase
    00008025   _SetupFlash
    0013ba13   _Shared_Ram_dataRead_c28__Fv
    0013b9fd   _Shared_Ram_dataWrite_c28__Fv
    00007040   _SpiaRegs
    0013bfbe   _SteadyStateAction__Fv
    0013bfbf   _SteadyStateEnter__Fv
    0013bfb1   _SteadyStateEventHandler__F12StateMessage
    0013bfc0   _SteadyStateExit__Fv
    0013bfce   _SyncAction__Fv
    0013bfcf   _SyncEnter__Fv
    0013bfc1   _SyncEventHandler__F12StateMessage
    0013bfd0   _SyncExit__Fv
    00007010   _SysCtrlRegs
    0013a99d   _TINT0_ISR
    0013a957   _USER10_ISR
    0013a961   _USER11_ISR
    0013a96b   _USER12_ISR
    0013a8fd   _USER1_ISR
    0013a907   _USER2_ISR
    0013a911   _USER3_ISR
    0013a91b   _USER4_ISR
    0013a925   _USER5_ISR
    0013a92f   _USER6_ISR
    0013a939   _USER7_ISR
    0013a943   _USER8_ISR
    0013a94d   _USER9_ISR
    0013af6e   _UnforceOff__3PWMFv
    0013bd0b   _UpdateDCBUS__Ff
    0013b34d   _UpdateObserver__FfT1
    0013b3b7   _UpdateParameters__FfT1
    0013b3f7   _Update__13PolarObserverF2XY
    0013b407   _Update__13PolarObserverFfT1
    0013b772   _Update__20FieldOrientedControlF10ThreePhaseT12PQ
    0000a374   _VL
    0000a36e   _VM
    0013b926   _VpfUpdate__Fv
    0013a9a7   _WAKEINT_ISR
    0013a989   _XINT1_ISR
    0013a993   _XINT2_ISR
    0013abaf   _XINT3_ISR
    00007070   _XIntruptRegs
    00000350   __STACK_END
    00000300   __STACK_SIZE
    00000190   __SYSMEM_SIZE
    00000001   __TI_args_main
    0000a3fc   ___TI_cleanup_ptr
    0000a3fe   ___TI_dtors_ptr
    0013a26e   ___ami__10ThreePhaseFRC10ThreePhase
    0013bc02   ___ami__2XYFRC2XY
    0013a340   ___ami__3ABOFRC3ABO
    0013a464   ___ami__3DQOFRC3DQO
    0013b8bf   ___ami__5AngleFRC5Angle
    0013a295   ___amu__10ThreePhaseFf
    0013a367   ___amu__3ABOFf
    0013a48b   ___amu__3DQOFf
    0013b8d8   ___amu__5AngleFf
    0013a247   ___apl__10ThreePhaseFRC10ThreePhase
    0013bbe6   ___apl__2XYFRC2XY
    0013a319   ___apl__3ABOFRC3ABO
    0013a43d   ___apl__3DQOFRC3DQO
    0013b8a6   ___apl__5AngleFRC5Angle
    ffffffff   ___binit__
    ffffffff   ___c_args__
    0013e106   ___cinit__
    0013a1c7   ___ct__10ThreePhaseF3DQO2XY
    0013a189   ___ct__10ThreePhaseFfN21
    0013a1a5   ___ct__10ThreePhaseFfT1
    0013a172   ___ct__10ThreePhaseFv
    0013b3c9   ___ct__13PolarObserverFfN21
    0013b74c   ___ct__20FieldOrientedControlFfN41
    0013bbcf   ___ct__2XYFfT1
    0013bbbb   ___ct__2XYFv
    0013a2d1   ___ct__3ABOF10ThreePhase
    0013a2ba   ___ct__3ABOFv
    0013a402   ___ct__3DQOF3ABO2XY
    0013a3bf   ___ct__3DQOF3ABO5Angle
    0013a3a3   ___ct__3DQOFfN21
    0013a38c   ___ct__3DQOFv
    0013afb9   ___ct__3PWMFPV9EPWM_REGSN21
    0013afae   ___ct__3PWMFv
    0013b890   ___ct__5AngleFf
    0013b87f   ___ct__5AngleFv
    0013be65   ___default_new_handler__Fv
    0013bfe6   ___etext__
    0013be89   ___memcpy_ff
    0013a018   ___mi__F10ThreePhaseRC10ThreePhase
    0013a07c   ___mi__F3ABORC3ABO
    0013a126   ___mi__F3DQORC3DQO
    0013b840   ___mi__F5AngleRC5Angle
    0013a030   ___ml__F10ThreePhasef
    0013a094   ___ml__F3ABOf
    0013a13e   ___ml__F3DQOf
    0013b855   ___ml__F5Anglef
    0013a04a   ___ml__Ff10ThreePhase
    0013a0ae   ___ml__Ff3ABO
    0013a158   ___ml__Ff3DQO
    0013b86a   ___ml__Ff5Angle
    0013beca   ___nw__FUl
    0013e1b2   ___pinit__
    0013a000   ___pl__F10ThreePhaseRC10ThreePhase
    0013a064   ___pl__F3ABORC3ABO
    0013a10e   ___pl__F3DQORC3DQO
    0013b82b   ___pl__F5AngleRC5Angle
    0013b6b6   ___sti___15_ControlCore_cpp_c4fdb75b
    0013bf50   ___sti___19_ADCMeasurements_cpp_IL
    0013afd0   ___sti___7_PWM_cpp_1908d5b5
    0013bd22   ___sti___9_DCBus_cpp_172f2735
    0013a000   ___text__
    0013bf1e   __args_main
    0000a37c   __lock
    0000a37e   __new_handler
    0013bfe5   __nop
    0013bfe1   __register_lock
    0013bfdd   __register_unlock
    00000050   __stack
    00000400   __sys_memory
    0000a37a   __unlock
    0013bf37   _abort
    0000e000   _c28_r_array
    0000c000   _c28_r_w_array
    0013bd79   _c_int00
    0013b196   _calloc
    0013b194   _chkheap
    0013bc1e   _cos
    0000a43b   _errno
    0013bf39   _exit
    0013afd9   _free
    0013b176   _free_memory
    0013b9a0   _main
    0013b042   _malloc
    0013ac41   _max__FiT1
    0013b154   _max_free
    0013b01c   _minit
    0013bf04   _modf
    0013b09b   _realloc
    0013ac0c   _rsvd_ISR
    0013bc7f   _sin
    0013be66   _sqrt
    0000a380   _stateHandlers
    0013be00   _update_timer__Fv
    ffffffff   binit
    0013e106   cinit
    0013fff0   code_start
    0013bfe6   etext
    0013e1b2   pinit
    
    
    GLOBAL SYMBOLS: SORTED BY Symbol Address 
    
    address    name
    --------   ----
    00000001   __TI_args_main
    00000050   __stack
    0000006a   _RamfuncsLoadSize
    0000006a   _RamfuncsRunSize
    00000190   __SYSMEM_SIZE
    00000300   __STACK_SIZE
    00000350   __STACK_END
    00000400   __sys_memory
    00000880   _DevEmuRegs
    00000ae0   _CsmRegs
    00000b00   _Adc1Result
    00000b00   _AdcResult
    00000b40   _Adc2Result
    00000c00   _CpuTimer0Regs
    00000c08   _CpuTimer1Regs
    00000c10   _CpuTimer2Regs
    00000ce0   _PieCtrlRegs
    00000d00   _PieVectTable
    00000e00   _PieVectTableCopy
    00001000   _DmaRegs
    00001700   _AnalogSysctrlRegs
    00001780   _HWBistRegs
    00004000   _FlashCtrlRegs
    00004300   _FlashEccRegs
    00004400   _M3PllRegs
    00004900   _RAMRegs
    00004a00   _RAMErrRegs
    00004e00   _CtoMIpcRegs
    00005000   _McbspaRegs
    00005100   _EPwm1Regs
    00005180   _EPwm2Regs
    00005200   _EPwm3Regs
    00005280   _EPwm4Regs
    00005300   _EPwm5Regs
    00005380   _EPwm6Regs
    00005400   _EPwm7Regs
    00005480   _EPwm8Regs
    00005500   _EPwm9Regs
    00005a00   _ECap1Regs
    00005a20   _ECap2Regs
    00005a40   _ECap3Regs
    00005a60   _ECap4Regs
    00005a80   _ECap5Regs
    00005aa0   _ECap6Regs
    00005b00   _EQep1Regs
    00005b40   _EQep2Regs
    00005b80   _EQep3Regs
    00005f80   _GpioCtrlRegs
    00005f80   _GpioG1CtrlRegs
    00005fc0   _GpioDataRegs
    00005fc0   _GpioG1DataRegs
    00005fe0   _GpioG1TripRegs
    00005fe0   _GpioTripRegs
    00006400   _Comp1Regs
    00006420   _Comp2Regs
    00006440   _Comp3Regs
    00006460   _Comp4Regs
    00006480   _Comp5Regs
    000064a0   _Comp6Regs
    00006f80   _GpioG2CtrlRegs
    00006fc0   _GpioG2DataRegs
    00007010   _SysCtrlRegs
    00007040   _SpiaRegs
    00007050   _SciaRegs
    00007060   _NmiIntruptRegs
    00007070   _XIntruptRegs
    00007100   _Adc1Regs
    00007100   _AdcRegs
    00007180   _Adc2Regs
    00007900   _I2caRegs
    00008000   _InitFlash
    00008000   _RamfuncsRunStart
    00008025   _SetupFlash
    0000804e   _FlashGainPump
    0000805b   _FlashLeavePump
    00008066   _DSP28x_usDelay
    0000806a   _RamfuncsRunEnd
    0000a000   _ConversionCount
    0000a040   _ILHist
    0000a360   _DCBus
    0000a362   _IM
    0000a368   _IL
    0000a36e   _VM
    0000a374   _VL
    0000a37a   __unlock
    0000a37c   __lock
    0000a37e   __new_handler
    0000a380   _stateHandlers
    0000a3fc   ___TI_cleanup_ptr
    0000a3fe   ___TI_dtors_ptr
    0000a400   _CpuTimer1
    0000a408   _CpuTimer2
    0000a410   _CpuTimer0
    0000a418   _LineSide__3PWM
    0000a41e   _MotorSide__3PWM
    0000a43a   _CurrentState
    0000a43b   _errno
    0000a440   _InvDCBusVoltage
    0000a442   _DCBusVoltage
    0000a444   _DCBusFilter
    0000c000   _c28_r_w_array
    0000e000   _c28_r_array
    00138000   _RamfuncsLoadStart
    0013806a   _RamfuncsLoadEnd
    0013a000   .text
    0013a000   ___pl__F10ThreePhaseRC10ThreePhase
    0013a000   ___text__
    0013a018   ___mi__F10ThreePhaseRC10ThreePhase
    0013a030   ___ml__F10ThreePhasef
    0013a04a   ___ml__Ff10ThreePhase
    0013a064   ___pl__F3ABORC3ABO
    0013a07c   ___mi__F3ABORC3ABO
    0013a094   ___ml__F3ABOf
    0013a0ae   ___ml__Ff3ABO
    0013a0c8   _DQFromAB__F3ABO5Angle
    0013a10e   ___pl__F3DQORC3DQO
    0013a126   ___mi__F3DQORC3DQO
    0013a13e   ___ml__F3DQOf
    0013a158   ___ml__Ff3DQO
    0013a172   ___ct__10ThreePhaseFv
    0013a189   ___ct__10ThreePhaseFfN21
    0013a1a5   ___ct__10ThreePhaseFfT1
    0013a1c7   ___ct__10ThreePhaseF3DQO2XY
    0013a247   ___apl__10ThreePhaseFRC10ThreePhase
    0013a26e   ___ami__10ThreePhaseFRC10ThreePhase
    0013a295   ___amu__10ThreePhaseFf
    0013a2ba   ___ct__3ABOFv
    0013a2d1   ___ct__3ABOF10ThreePhase
    0013a319   ___apl__3ABOFRC3ABO
    0013a340   ___ami__3ABOFRC3ABO
    0013a367   ___amu__3ABOFf
    0013a38c   ___ct__3DQOFv
    0013a3a3   ___ct__3DQOFfN21
    0013a3bf   ___ct__3DQOF3ABO5Angle
    0013a402   ___ct__3DQOF3ABO2XY
    0013a43d   ___apl__3DQOFRC3DQO
    0013a464   ___ami__3DQOFRC3DQO
    0013a48b   ___amu__3DQOFf
    0013a4b0   _InitAdc1
    0013a4c4   _InitAdc1Aio
    0013a4e6   _Adc1OffsetSelfCal
    0013a50d   _Adc1ChanSelect
    0013a582   _Adc1Conversion
    0013a6a9   _InitAdc
    0013a6ac   _InitAdcAio
    0013a6af   _AdcOffsetSelfCal
    0013a6b2   _AdcChanSelect
    0013a6b8   _AdcConversion
    0013a6be   _InitAdc2
    0013a6d2   _InitAdc2Aio
    0013a6f4   _Adc2OffsetSelfCal
    0013a71b   _Adc2ChanSelect
    0013a790   _Adc2Conversion
    0013a8b7   _INT13_ISR
    0013a8c1   _INT14_ISR
    0013a8cb   _DATALOG_ISR
    0013a8d5   _RTOSINT_ISR
    0013a8df   _EMUINT_ISR
    0013a8e9   _NMI_ISR
    0013a8f3   _ILLEGAL_ISR
    0013a8fd   _USER1_ISR
    0013a907   _USER2_ISR
    0013a911   _USER3_ISR
    0013a91b   _USER4_ISR
    0013a925   _USER5_ISR
    0013a92f   _USER6_ISR
    0013a939   _USER7_ISR
    0013a943   _USER8_ISR
    0013a94d   _USER9_ISR
    0013a957   _USER10_ISR
    0013a961   _USER11_ISR
    0013a96b   _USER12_ISR
    0013a975   _ADCINT1_ISR
    0013a97f   _ADCINT2_ISR
    0013a989   _XINT1_ISR
    0013a993   _XINT2_ISR
    0013a99d   _TINT0_ISR
    0013a9a7   _WAKEINT_ISR
    0013a9b1   _EPWM1_TZINT_ISR
    0013a9bb   _EPWM2_TZINT_ISR
    0013a9c5   _EPWM3_TZINT_ISR
    0013a9cf   _EPWM4_TZINT_ISR
    0013a9d9   _EPWM5_TZINT_ISR
    0013a9e3   _EPWM6_TZINT_ISR
    0013a9ed   _EPWM7_TZINT_ISR
    0013a9f7   _EPWM8_TZINT_ISR
    0013aa01   _EPWM1_INT_ISR
    0013aa0b   _EPWM2_INT_ISR
    0013aa15   _EPWM3_INT_ISR
    0013aa1f   _EPWM4_INT_ISR
    0013aa29   _EPWM5_INT_ISR
    0013aa33   _EPWM6_INT_ISR
    0013aa3d   _EPWM7_INT_ISR
    0013aa47   _EPWM8_INT_ISR
    0013aa51   _ECAP1_INT_ISR
    0013aa5b   _ECAP2_INT_ISR
    0013aa65   _ECAP3_INT_ISR
    0013aa6f   _ECAP4_INT_ISR
    0013aa79   _ECAP5_INT_ISR
    0013aa83   _ECAP6_INT_ISR
    0013aa8d   _EPWM9_TZINT_ISR
    0013aa97   _EQEP1_INT_ISR
    0013aaa1   _EQEP2_INT_ISR
    0013aaab   _EQEP3_INT_ISR
    0013aab5   _EPWM9_INT_ISR
    0013aabf   _SPIRXINTA_ISR
    0013aac9   _SPITXINTA_ISR
    0013aad3   _MRINTA_ISR
    0013aadd   _MXINTA_ISR
    0013aae7   _DINTCH1_ISR
    0013aaf1   _DINTCH2_ISR
    0013aafb   _DINTCH3_ISR
    0013ab05   _DINTCH4_ISR
    0013ab0f   _DINTCH5_ISR
    0013ab19   _DINTCH6_ISR
    0013ab23   _I2CINT1A_ISR
    0013ab2d   _I2CINT2A_ISR
    0013ab37   _SCIRXINTA_ISR
    0013ab41   _SCITXINTA_ISR
    0013ab4b   _ADCINT3_ISR
    0013ab55   _ADCINT4_ISR
    0013ab5f   _ADCINT5_ISR
    0013ab69   _ADCINT6_ISR
    0013ab73   _ADCINT7_ISR
    0013ab7d   _ADCINT8_ISR
    0013ab87   _MTOCIPC_INT1_ISR
    0013ab91   _MTOCIPC_INT2_ISR
    0013ab9b   _MTOCIPC_INT3_ISR
    0013aba5   _MTOCIPC_INT4_ISR
    0013abaf   _XINT3_ISR
    0013abb9   _CFLSINGERR_ISR
    0013abc3   _CFLFSM_ISR
    0013abcd   _CRAMSINGERR_ISR
    0013abd7   _CRAMACCVIOL_ISR
    0013abe1   _LVF_ISR
    0013abeb   _LUF_ISR
    0013abf5   _EMPTY_ISR
    0013ac02   _PIE_RESERVED
    0013ac0c   _rsvd_ISR
    0013ac16   _DetermineSector__FfN21
    0013ac41   _max__FiT1
    0013ac4a   _SetEPWM__FUiT1fN23
    0013ad0d   _SVM__FfN21
    0013adcc   _ConfigureSVM_EPWM__Fv
    0013adff   _ConfigurePWMReg__FPV9EPWM_REGS
    0013ae4c   _ConfigureLinePWM__3PWMSFv
    0013ae8b   _ConfigureMotorPWM__3PWMSFv
    0013aeca   _SetVoltages__3PWMF10ThreePhase
    0013af40   _ForceOff__3PWMFv
    0013af6e   _UnforceOff__3PWMFv
    0013afae   ___ct__3PWMFv
    0013afb9   ___ct__3PWMFPV9EPWM_REGSN21
    0013afd0   ___sti___7_PWM_cpp_1908d5b5
    0013afd9   _free
    0013b01c   _minit
    0013b042   _malloc
    0013b09b   _realloc
    0013b154   _max_free
    0013b176   _free_memory
    0013b194   _chkheap
    0013b196   _calloc
    0013b1ae   _ConfigureSOC__FPV14ADCSOCxCTL_REG7Channel7Trigger
    0013b1c9   _ConfigurePWMSOC__FPV9EPWM_REGS3SOCUiT3
    0013b201   _ConfigureADCINT__FPV13INTSEL1N2_REG12INTSELECTIONUi
    0013b227   _ConfigureSimultaneous__Fv
    0013b23c   _ConfigureADC__Fv
    0013b2ef   _InitADCClocks__Fv
    0013b34d   _UpdateObserver__FfT1
    0013b3b7   _UpdateParameters__FfT1
    0013b3c4   _GetSpeed__Fv
    0013b3c9   ___ct__13PolarObserverFfN21
    0013b3f7   _Update__13PolarObserverF2XY
    0013b407   _Update__13PolarObserverFfT1
    0013b481   _ADCLineSide__Fv
    0013b535   _ADCMotorSide__Fv
    0013b642   _MotorSide__F10ThreePhaseT1f
    0013b680   _LineSide__F2PQ10ThreePhaseT2
    0013b6b6   ___sti___15_ControlCore_cpp_c4fdb75b
    0013b74c   ___ct__20FieldOrientedControlFfN41
    0013b772   _Update__20FieldOrientedControlF10ThreePhaseT12PQ
    0013b7cb   _CurrentControl__20FieldOrientedControlF2PQ3DQO
    0013b82b   ___pl__F5AngleRC5Angle
    0013b840   ___mi__F5AngleRC5Angle
    0013b855   ___ml__F5Anglef
    0013b86a   ___ml__Ff5Angle
    0013b87f   ___ct__5AngleFv
    0013b890   ___ct__5AngleFf
    0013b8a6   ___apl__5AngleFRC5Angle
    0013b8bf   ___ami__5AngleFRC5Angle
    0013b8d8   ___amu__5AngleFf
    0013b8f1   _ChangeVoltsPerHertz__Ff
    0013b903   _SetHertz__Ff
    0013b926   _VpfUpdate__Fv
    0013b997   _ConfigureTimestep__Ff
    0013b9a0   _main
    0013b9fd   _Shared_Ram_dataWrite_c28__Fv
    0013ba13   _Shared_Ram_dataRead_c28__Fv
    0013ba2d   _InitPeripheralClocks
    0013ba4d   _CsmUnlock
    0013ba6e   _EcslUnlock
    0013ba85   _LockDevice
    0013ba8d   _GetEXEstatus
    0013ba9f   _CSMSecurityStatus
    0013baab   _ECSLSecurityStatus
    0013bab7   FS$$DIV
    0013bb3f   _InitCpuTimers
    0013bb80   _ConfigCpuTimer
    0013bbbb   ___ct__2XYFv
    0013bbcf   ___ct__2XYFfT1
    0013bbe6   ___apl__2XYFRC2XY
    0013bc02   ___ami__2XYFRC2XY
    0013bc1e   _cos
    0013bc7f   _sin
    0013bd0b   _UpdateDCBUS__Ff
    0013bd22   ___sti___9_DCBus_cpp_172f2735
    0013bd2b   _ConfigureFaultPins
    0013bd79   _c_int00
    0013bdbf   _ChangeState__F5State
    0013bddb   _SMachineNotifyEvent__F12StateMessage
    0013bdf0   _SMachineAction__Fv
    0013bdfc   _SMachineInit__Fv
    0013be00   _update_timer__Fv
    0013be38   _InitPieCtrl
    0013be5c   _EnableInterrupts
    0013be65   ___default_new_handler__Fv
    0013be66   _sqrt
    0013be89   ___memcpy_ff
    0013beaa   _InitPieVectTable
    0013beca   ___nw__FUl
    0013beea   _RunEventHandler__F12StateMessage
    0013bef7   _RunAction__Fv
    0013befa   _RunEnter__Fv
    0013beff   _RunExit__Fv
    0013bf04   _modf
    0013bf1e   __args_main
    0013bf37   C$$EXIT
    0013bf37   _abort
    0013bf39   _exit
    0013bf50   ___sti___19_ADCMeasurements_cpp_IL
    0013bf61   _ChargeEventHandler__F12StateMessage
    0013bf6e   _ChargeAction__Fv
    0013bf6f   _ChargeEnter__Fv
    0013bf70   _ChargeExit__Fv
    0013bf71   _DeadStartEventHandler__F12StateMessage
    0013bf7e   _DeadStartAction__Fv
    0013bf7f   _DeadStartEnter__Fv
    0013bf80   _DeadStartExit__Fv
    0013bf81   _FaultEventHandler__F12StateMessage
    0013bf8a   _FaultAction__Fv
    0013bf8b   _FaultEnter__Fv
    0013bf90   _FaultExit__Fv
    0013bf91   _HighIdleEventHandler__F12StateMessage
    0013bf9e   _HighIdleAction__Fv
    0013bf9f   _HighIdleEnter__Fv
    0013bfa0   _HighIdleExit__Fv
    0013bfa1   _LowIdleEventHandler__F12StateMessage
    0013bfae   _LowIdleAction__Fv
    0013bfaf   _LowIdleEnter__Fv
    0013bfb0   _LowIdleExit__Fv
    0013bfb1   _SteadyStateEventHandler__F12StateMessage
    0013bfbe   _SteadyStateAction__Fv
    0013bfbf   _SteadyStateEnter__Fv
    0013bfc0   _SteadyStateExit__Fv
    0013bfc1   _SyncEventHandler__F12StateMessage
    0013bfce   _SyncAction__Fv
    0013bfcf   _SyncEnter__Fv
    0013bfd0   _SyncExit__Fv
    0013bfd1   _InitEventHandler__F12StateMessage
    0013bfda   _InitAction__Fv
    0013bfdb   _InitEnter__Fv
    0013bfdc   _InitExit__Fv
    0013bfdd   __register_unlock
    0013bfe1   __register_lock
    0013bfe5   __nop
    0013bfe6   ___etext__
    0013bfe6   etext
    0013e000   _PieVectTableInit
    0013e106   ___cinit__
    0013e106   cinit
    0013e1b2   ___pinit__
    0013e1b2   pinit
    0013fff0   code_start
    0013fff2   _FlashExeOnly
    0013fff4   _EcslPwl
    0013fff8   _CsmPwl
    ffffffff   ___binit__
    ffffffff   ___c_args__
    ffffffff   binit
    
    [388 symbols]
    

    2. It does hit the break point after the IPC command.

    3. If I reset both cores, then run M3 first then C28, it does run successfully.

    4. If I pause the C28, the program execution is at the C28, inside the while(1) loop at the end of its main function.

    5. I do see PWMs


    Mike

  • MIke,

    thanks that proves that your applications are booting fine from reset. Also I saw the Lab4-2_M3.C, I would move the

    IPCMtoCBootControlSystem() in M3 main to the end of when the main completes all the IO configurations and shared RAM configurations needed by C28x.

    Try it out and let me know if it makes any difference in your application.

     

    Best Regards

    Santosh

     

  • I did move the IPCMtoCBootControlSystem to the end of main, right before the while loop. But the PWM still does not work properly upon reboot.

    Did Lab4-2 work for you? As in, the PWM worked even after rebooting? It did not work for me. The PWM looks right running from the debugger, but not from rebooting. Why might this be?

    Mike

  • Mike,

    that's weird, looks like we are missing something, the code flow looks good. Only thing I could think of is..if GEL scripts are doing something funny that's not happening when running stand alone.

    I couldn't get to the set up to run the lab on my desk yet. Will get to it tomorrow and let you know.

     

    Best Regards

    Santosh

     

  • Hi Santosh,


    I just wanted to show you exactly what is happening. The first image is what I see on the oscilloscope when running Lab4-2 from the debugger. You can see the nice consistent PWM on bit 6.

    If I stop the debugger, then power cycle the board, then I get the following when it boots up:

    Notice that now there is only a single square wave, spread out extremely far. It's still periodic, but it doesn't make sense anymore.

    I get the same thing when I run my own code, except that the identical change happens on all six PWM signals. All six look good before, and they each look like the second picture afterwards.

  • Hi Santosh,

    Sorry to bother you. Have you had a chance to look at this any further?

    Since it is exhibiting the same behavior even for TI-packaged examples, maybe it is something wrong with my settings?

    I've tried it on two different controlCards, so it is not just a faulty single controlCard.


    Mike

  • Mike,

    sorry I couldn't get to it yet. Will let you know by this Friday, it shouldn't take much time as it seems we have a way to reproduce it properly.

     

    Best Regards

    Santosh

  • MIke,

    do you think there could be a problem with the scope? or scope being connected across power cycle of the board?

    I will see if I can reproduce this today.

    Best Regards

    Santosh

  • Hi Santosh,


    It's definitely not the scope. I've tried two different oscillscopes, digital and analog. I doubt the scope is interfering with the power cycle. It's high impedance connected at isolated output pins.


    Mike

  • MIke,

    which revision of the chip you are running on. The value of DID0 register is ?

    Best Regards

    Santosh

  • DID0 register is:

    0x20400000

  • Mike,

    I think I might know the problem now. you are running on REV0 device. Take a look at this function in the driverlib

    unsigned short IPCMtoCBootControlSystem(unsigned long ulBootMode); does it have the below code?

        //Initialize Control Subsystem memories
        if(RAMControlInitM1MsgRam())
            return true;
        if(RAMControlInitL0L3Ram())
            return true;

     

    if not you are using latest driverlib which is good for REVA and beyond. For REV0 you would need the function from earlier version of driverlib (for ex: v160). Take a look at file ipc_util.c for the above function (edit: in C:\ti\controlSUITE\device_support\f28m35x\v160\MWare\driverlib). It has the above mentioned piece of code which does RAM-INITS for C28x RAMs before the boot mode command is sent. This is needed on REV0 F28M35x devices.

    you can keep using the latest version of driverlib (it has other fixes) but please modify the above function and try it out.

     

    Best Regards

    Santosh

     

     

     

  • Hi Santosh,

    How do I look at the function in drivelib? Ipc.h has the declaration, but how do I look at the source for driverlib?

    Mike

  • Mike,

    if you have a REVA (or beyond) device or Control card, try that without any changes. if not do below.

    Driverlib sources come with controlSuite installation.

    to look at driver lib source files :- C:\ti\controlSUITE\device_support\f28m35x\v201\MWare\driverlib

    you can import driverlib project into CCS (project would be in the same directory shown above), modify the code and then rebuild the project. Once driverlib is rebuilt, rebuild the application and load.

    to fix your function for REV0, add below code shown in RED in function IPCMtoCBootControlSystem in file ipc_util.c and rebuild the driverlib project.

     

    unsigned short IPCMtoCBootControlSystem(unsigned long ulBootMode)

    {  

       // Wait until C28 control system boot ROM is ready to receive MTOCIPC INT1    

    // interrupts    

    while ((HWREG(MTOCIPC_BASE +                   IPC_O_CTOMIPCBOOTSTS) &             CBROM_BOOTSTS_CTOM_CONTROL_SYSTEM_READY)!=            CBROM_BOOTSTS_CTOM_CONTROL_SYSTEM_READY)    

    {   

      }

        //Initialize Control Subsystem memories   

      if(RAMControlInitM1MsgRam())        

           return true;    

     if(RAMControlInitL0L3Ram())        

         return true;

        // Loop until C28 control system IPC flags 1 and 32 are available

    ...

    ...

    }

     

    To look at older driverlib source files (for ex: v160) look at C:\ti\controlSUITE\device_support\f28m35x\v160\MWare\driverlib

     

    Best Regards

    Santosh

     

  • Thanks Santosh, I found it. It is indeed missing that code.

    I will rebuild this but I won't be able to test it until Monday, so I will let you know then if it works.

    If we obtain a later revision (REVA and beyond) chip to use later, should I revert driverlib back to its original code, or leave the new code in?

    Thanks

  • Mike,

    its a good idea to wrap the new added code into a if((*(volatile unsigned int *)DID1 & 0xFFFF) == 0x0) {} loop, so the RAM-INIT code would get executed only for REV0 devices and be skipped for FEVA devices onwards.

    it doesn't hurt to run this code as it is on REVA but it is not necessary to zero-initialize RAM(s) for an application as it is taken care of by boot code on power up.

     

    Best Regards

    Santosh

     

  • Hi Santosh,

    I just had a chance to try it out, and it works! Thanks very much for your help.

    Mike

  • awesome - please get a REVA as soon as possible. there were lots of fixes done and it is TMS I believe,

     

    Best Regards

    Santosh