I would like to understand the computational requirements of the SFO() routine for calibrating the HRPWMs. When the routine is called, how many CPU cycles are used before control is returned to the calling code? Am I correct in assuming that the routine must be called some non-deterministic number of times before a calibration is complete? How frequently (or infrequently) can the routine be called and still eventually get a successful calibration?
In my design, I would like to be able to run this routine periodically and know that it will not consume precious clock cycles (so how many will it require? what's the minimum number? the maximum number?). I would also like to call it as infrequently as possible, again so not to consume precious clock cycles (so what governs the minimum rate at which the routine must be called for a reliable calibration to occur? every 100us, every 1ms? If it depends on temperature and voltage changes, in what manner?).
From what I understand, there is some level of TI's IP contained in what this routine does. But there must be some way to better characterize and explain its performance as viewed from the outside so that designers can know what to expect.
Any help is greatly appreciated.