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Symmetric HRPWM possible?

StephanS
Genius 4087 points


Hi all,

is symmetric High resolution PWM (HRPWM) with MEP possible?

It is not obvious from the datasheet, but if I set EpwmRegs.EDGMODE = 3 (MEP control of both edges), CMPAHR has no effect any more.

I can do symmetric PWM with EDGMODE=1 or 2 (only on rising or falling edge), but then there is a "gap" between CMPA=x, CMPAHR=0xFF00 and CMPA=x+1, CMPAHR=0.

The datasheet says "EDGMODE=3: MEP control of both edges (TBPHSHR or TBPRDHR)" - this may imply that it does not work for HRPWM, only for HR phase shift and HR period.

  • 0
    TI__Intellectual 2690 points

    Stephan,

    What device are you using?

    The 2802x and 2803x devices allow for high-resolution symmetric HRPWM with (TBPRDHR+CMPAHR) or with TBPHSHR.

    The 2833x, 2823x, 280x, and 2804x devices allow for high-resolution HRPWM in symmetric mode only with TBPHSHR.

    In all of the above cases, EDGMODE = 3.

    CMPAHR = 0xFF00 is not necessarily the maximum number of MEP steps in a SYSCLK cycle. You have to scale by the MEP_ScaleFactor (# of MEP steps per sysclk cycle changes by Vdd and temperature).  Please see the HRPWM reference guide for more information OR see the hrpwm_sfo examples that come with the header files and peripheral examples.

     

  • 0 in reply to CChang
    Genius 4087 points

    I am using the 28035.

    So it should be possible - then there must be something wrong with my configuration.

    I just wanted to have this confirmed since datasheet AND examples are not handling symmetric duty cycle, only symmetric period.

  • 0 in reply to StephanS
    Genius 4087 points

    Now I have tried to change the "hrpwm_duty_sfo_v6" example to symmetric PWM and again get no HRPWM.

    The things I changed in the example are all in void HRPWM_Config(period):

    //    (*ePWM[j]).TBCTL.bit.CTRMODE = TB_COUNT_UP;
        (*ePWM[j]).TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;

        //(*ePWM[j]).AQCTLA.bit.ZRO = AQ_SET;               // PWM toggle high/low
        //(*ePWM[j]).AQCTLA.bit.CAU = AQ_CLEAR;
        (*ePWM[j]).AQCTLA.bit.CAU = AQ_SET;
        (*ePWM[j]).AQCTLA.bit.CAD = AQ_CLEAR;

        //(*ePWM[j]).HRCNFG.bit.EDGMODE = HR_FEP;          // MEP control on falling edge
        (*ePWM[j]).HRCNFG.bit.EDGMODE = HR_BEP;          // MEP control on both edges

    Is there something missing?

  • 0 in reply to StephanS
    TI__Intellectual 2690 points

    Stefan -

    The  hrpwm_duty_sfo_v6 is single-edge duty high-res control with CMPA:CMPAHR only.

    In symmetric mode, you can only have High-Res. phase or high-res period.  In high-res period mode, you can modify your duty cycle as desired as well.

    Use the hrpwm_prdupdown_sfo_v6 function for symmetric mode and modify this example for duty cycle.  This should be what you are looking for.

  • 0 in reply to CChang
    Genius 4087 points

    Ah, enabling high-res period for symmetric pwm (even for high-res duty cycle, not only for high-res period) was the key. Now it works, thanks for the help!