How to reenable EPWM after one shot Trip event

Hi Megha,

But after configuring above bits, EPWM are not reenabling.

Is there a way to reenable the PWM after a OSHT trip event.

They're meant to function like above and not  enabling them again to ensure safety! If you're really interested in enabling them again: try using the watchdog module to restart the controller from this state.

Regards,

Gautam

Thanks Gautam for your suggestion.

As per datasheet,

When any of the enabled pins go low, a one-shot trip event occurs for this ePWM module. When the event occurs, the action defined in the TZCTL register (Figure 3-99) is taken on the EPWMxA and EPWMxB outputs. The one-shot trip condition remains latched until the user clears the condition via the TZCLR register

I just want to understand that even if i am clearing TZCLR for one shot trip, that event is not getting cleared.

In my project requirement is that use one shot trip for over voltage and after detecting low signal on one of GPIO, clear one shot trip and reenable EPWM. So here i can not use watchdog module as it will restart firmware.

Is there any other way to clear one shot trip without using watchdog?

Thanks,

Megha

Megha,

The one-shot trip condition remains latched until the user clears the condition via the TZCLR register

Yup, I do recollect this condition. I guess you might not be able to clear the OSHT TZ because they are EALLOW protected.

Try this:

EALLOW;
EPwm1Regs.TZCLR.bit.OST = 1;
EDIS;

And sorry for the above post, that is what I intend to do for my application, though it can be cleared by the coder if he wants to!

Regards,

Gautam

I have not mentioned about EALLOW and EDIS in my first post. Sorry for that.

But yes, I have used EALLOW & EDIS as,

EALLOW;
EPWM1.TZCLR.bit.OST = 1;
EPWM1.TZCLR.bit.INT = 1;
EPWM2.TZCLR.bit.OST = 1;
EPWM2.TZCLR.bit.INT = 1;
EPWM3.TZCLR.bit.OST = 1;
EPWM3.TZCLR.bit.INT = 1;
EDIS;

But still this also didn't solve my problem.

I have configured EPWM1A and EPWM1B for one shot trip based on COMP 1 as below,

EALLOW;
EPWM1.DCTRIPSEL.bit.DCAHCOMPSEL = DC_COMP1OUT; // DCAH = Comparator 1 output
EPWM1.DCTRIPSEL.bit.DCBHCOMPSEL = DC_COMP1OUT; // DCBH = Comparator 1 output
EPWM1.TZDCSEL.bit.DCAEVT1 = TZ_DCAH_HI; // DCAEVT1 = DCAH High
EPWM1.TZDCSEL.bit.DCBEVT1 = TZ_DCBH_HI; // DCBEVT1 = DCBH High
EPWM1.DCACTL.bit.EVT1SRCSEL = DC_EVT1; //DCAEVT1 = DCAEVT1 (not filtered)
EPWM1.DCBCTL.bit.EVT1SRCSEL = DC_EVT1; //DCBEVT1 = DCBEVT1 (not filtered)
EPWM1.DCACTL.bit.EVT1FRCSYNCSEL = DC_EVT_ASYNC; // Take async path
EPWM1.DCBCTL.bit.EVT1FRCSYNCSEL = DC_EVT_ASYNC; // Take async path

// Configure ePWM1 trip-zone module DCEVT1
EPWM1.TZSEL.bit.DCAEVT1 = 1; // Enable DCAEVT1 as a One Shot trip for EPWM1A
EPWM1.TZSEL.bit.DCBEVT1 = 1; // Enable DCBEVT1 as a One Shot trip for EPWM1B

// Enable TZ interrupt
EPWM1.TZEINT.bit.OST = 1; // Enable One Shot Interrupt

// Enable EPWM INTn in the PIE: Group 2 interrupt 1 for EPWM1
PieCtrlRegs.PIEIER2.bit.INTx1 = 1;
// Interrupts are re-mapped to ISR functions.
PieVectTable.EPWM1_TZINT = &EPWM_TZ_isr;
EDIS;

As above I have configured other 2 EPWM, EPWM2 and EPWM3 for one shot trip.

One shot trip event occurs on over bus supply condition and action on all EPWM are also correct.

Is any other configuration I am missing in my code to clear one shot trip?

Thanks, 

Megha

It seems you've configured all of the above in main. Try defining TZCLR in the ISR and not in main; try like this:

interrupt void epwm1_tzint_isr(void)
{
   EPwm1TZIntCount++;

// Your Interrupt Routine

 EALLOW;
 EPwm1Regs.TZCLR.bit.OST = 1;
 EPwm1Regs.TZCLR.bit.INT = 1;
 EDIS;

   // Acknowledge this interrupt to receive more interrupts from group 2
   PieCtrlRegs.PIEACK.all = PIEACK_GROUP2;

}

Regards,

Gautam

Yes Gautam, I have cleared OST bit after detecting low signal on one of GPIO.

As per your suggestion, if i cleared OST bit in one shot trip interrupt, it will clear immediately.

But I want it to clear after some time on GPIO status.

Thanks,

Megha

As per your suggestion, if i cleared OST bit in one shot trip interrupt, it will clear immediately.

Very true, but does that atleast work for you???

I have cleared OST bit from one shot trip interrupt and yes it is working.

It looks like EPWM1.TZCLR.bit.OST = 1 is clearing OST bit and generating next OST interrupt immediately.

That means I need to look other conditions of my firmware as well to restart EPWM.

Thanks Gautam for your suggestion.

Thanks,

Megha

That means I need to look other conditions of my firmware as well to restart EPWM.

Thanks Gautam for your suggestion.

Exactly! Now you got it :)

Just work around your code to correctly place the reset condition. Do keep us updated.

Regards,

Gautam