It seems that the Clock Phase setting for the SPI is exactly the opposite of what everyone else using SPI indicates as a specification. For example, Figure 14-25 in the Technical Reference Manual has a graph for Clock Polarity = 0 and Clock Phase = 0, and it shows data change on the rising edge and data sampling (which happens in the middle of the bit period) on the falling edge. Likewise, the following 3 graphs for the othe SPI modes show this same inverted Clock Phase behavior.
Every other SPI specification has sampling on the first edge (falling or rising determined by Clock Polarity) for the modes where Clock Phase = 0, and second edge for Clock Phase = 1. For example:
http://www.rosseeld.be/DRO/PIC/SPI_Timing.htm
http://en.wikipedia.org/wiki/Serial_Peripheral_Interface_Bus#Mode_numbers.
This is not just a problem of mislabeled graphs in the TRM, I verified this on the oscilloscope and the clock behavior is actually inverted.
Edit: I am working with the F28M35H52C1