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Problem in creation & building a new project ( dual core) in TMS320F28337D delfino

Raja Saha94
Intellectual 575 points
Other Parts Discussed in Thread: CONTROLSUITE, UNIFLASH

Hi all,

I am trying to create a new dual core project for TMS320F28337 apart from the given example. I am following the firmware user guide to do so, which is given in controlsuite. 

Project for both the CPU's gets build successfully.  CPU1 code is loadded successfully. But while CPU2 code is loaded the following error is coming:-

"C28xx_CPU2 : Error setting the GSxMASTERSEL register for flash operation.

Hence the load is cancelled.

Anyone has faced these problem ? Or any Idea..

Please help.

  • 0
    TI__Guru 61235 points

    Raja,

    GSx memory is assigned to CPU1 after a reset (GSxMSEL register).  CCS therefore is having trouble loading the initialized sections (e.g., code) that you have linked there for CPU2.  You need to have GSx assigned to CPU2 before you do the load.  You can:

    1) Run your CPU1 code past the point where it assigns the GSx RAM blocks to CPU2, and then load your CPU2 code.

    or

    2) Modify the GEL file you are using in CCS so that the desired GSx RAM blocks are assigned to CPU2 when you connect to CPU2 (GEL_OnConnect() function).

    Regards,

    David

  • 0 in reply to David M. Alter
    TI__Guru* 87155 points

    Raja,

    Are you using CCS Plugin or UniFlash to load code in to Flash?

    If you are using CCS Plugin, do you have CPU1 connected when trying to load the code in to CPU2?

    Thanks and regards,
    Vamsi

  • 0 in reply to David M. Alter
    Intellectual 575 points
    David,
    I have not got your point fully.
    Are u asking me to put some breakpoints in code and then run? Can u please explain it in more detail.
    I have followed F2837xD-FRM-EX-UG.pdf for creation dual core project.
    So far I have studied GSXRAM is shared RAM between CPU1 & CPU2. Hence configuring this for a particular CPU, will result the shared RAM to be eligible for Read only for the other CPU.
    Hence if I make it for CPU2, then will it cause the same problem for CPU1.
    Please help me to understand better of your opinion.
    Regards
    Raja
  • 0 in reply to Vamsi Gudivada
    Intellectual 575 points
    I am using CCS.
    Yes it is, i.e. CPU1 is connected.
    Regards
  • 0 in reply to Raja Saha94
    TI__Guru* 87155 points

    Raja,

    Flash Plugin uses shared RAM for doing Flash operations (as Shared RAM is the only unsecured RAM available for both CPUs).  When CPU1 Flash Plugin is used, shared RAM ownership is needed for CPU1.  When CPU2 Flash Plugin is used, shared RAM ownership is needed for CPU2.  At reset, CPU1 owns the shared RAM for read/write.  When CPU2 Flash operations are selected by user in CPU2 Flash Plugin, Flash Plugin will halt the CPU1 (if it is executing) and configures the GSxMSEL register to give the shared RAM ownership to CPU2 so that CPU2 Flash Plugin code can get executed.  

    The error message that you got tells that the Flash Plugin is not able to write to GSxMSEL register to assign the ownership of shared RAM to CPU2 and hence CPU2 Flash operation is failing.

    What is CPU1 doing when you try to do the CPU2 Flash operation?  

    Try below sequence and see if it works:

    1) Load code in to CPU1 memory (dont execute it yet)

    2) Keep the CPU1 connected and load code in to CPU2 memory

    3) Execute CPU1 code

    4) Execute CPU2 code

    Thanks and regards,

    Vamsi   

  • 0 in reply to Vamsi Gudivada
    Intellectual 575 points

    Vamsi,

    Thanks for your response. Your explanation is very cleared to me.

    However error is still there.

    I am attaching the screen shots of the steps I am following.

    project for CPU2 is selected ( or made active)screen_CPU1_CPU2_code.docx

    Regards

    Raja 

  • 0 in reply to Raja Saha94
    TI__Guru* 87155 points

    Raja,

    Instead of using the bug button to launch the target configuration/connect, could you follow below steps and see if that helps?

    1) Launch the target configuration from the Target configurations window

    2) Connect to CPU1 and then to CPU2

    3) Reset CPU1 and then CPU2

    4) Load the code in CPU1 by using the debug window menu button "Run" -> Load -> Load program

    5) Load the code in CPU2 by using the debug window menu button "Run" -> Load -> Load program

    Thanks and regards,

    Vamsi

  • 0 in reply to Vamsi Gudivada
    Intellectual 575 points

    No, Vamsi the same problem is still there.

    If possible can you please attach the screenshot of the steps for a dual core project build & execution from both cores.

    Regards

    Raja Saha

  • 0 in reply to Raja Saha94
    TI__Guru* 87155 points
    Raja,

    Make sure to check for CCS updates and install any updates that are available from Debug Server Flash. Prefer CCSV6.0.1.

    Can you try the below steps? I just removed the step in which you load code in to CPU1. I want to make sure that CPU1 is not disconnected. Screenshots that you sent earlier show that you are disconnecting CPU1.

    1) Launch the target configuration from the Target configurations window (View -> Target Configurations -> Right click on the F28377D ccxml -> Launch selected configuration)

    2) Connect to CPU1 and then to CPU2 (In the debug window, select the C28xx_CPU1, right click -> Connect Target. Do the same thing for C28xx_CPU2).

    3) Reset CPU1 and then CPU2 (Select C28xx_CPU1, then in the debug window menu -> Run -> Reset -> CPU reset. Do this for C28xx_CPU2)

    4) Load the code in CPU2 (Select C28xx_CPU2 and then in the debug window menu click on "Run" -> Load -> Load program and choose the .out file that you want to load in to CPU2)

    Thanks and regards,
    Vamsi
  • 0 in reply to Vamsi Gudivada
    Intellectual 575 points
    Yes it is working after following the steps you had mentioned. However I did not reset the cores.
    1. CPU1 was build & debug by using debug button.
    2. CPU2 is now connected by right click & then connect.
    3. CPU2 is loaded by using load program menu.

    However I can not debug the code, i.e. code is running in standalone mode, but breakpoints, watch window & variable updations is not happening.
    Thanks
    Raja
  • 0 in reply to Raja Saha94
    Intellectual 345 points
    Very well, until here I could confirm all the steps above to work!
    But I still feel not familiar with the whole dual core debug system. First of all, I need to load all the time the firmware (run/load/cpu1..or..cpu2) for the debugger to match the symbols, even if no changes were made to the .out file, which is a waste of time.
    What I really want is forgetting about cpu2, let the firmware in cpu2 boot all the time at power up and then debug only cpu1, because there is where the developments take place from now on. (Adc and Pwm are the task for cpu2)
    Also, and maybe related to this item, is that it is possible to launch both cpu's, run cpu1 and then run cpu2, with success using the procedures, described by Vamsi. But if I stop debugging and only power off and up the delfino, no life shows from the pwm's. The same when I only connect, reset and start the cpu's.
    Suggestions would be very welcome.
  • 0 in reply to Raja Saha94
    Intellectual 345 points
    I am doing almost the same and until here I could confirm all the steps above to be working! But I have comparable problems as well.
    I still do not feel familiar with the whole dual core debug system in CCS6.1. First of all, I need to load all the time the firmware (run/load/cpu1..or..cpu2) for the debugger to match the symbols, even if no changes were made to the .out file; which is waste of time.
    What I really want is letting the firmware in cpu2 boot all the time at power up and then debug only cpu1, because that is where the developments take place from now on. (Adc and Pwm are the task for cpu2 and finished now)
    Also, and maybe related to this item, is that although it is possible to launch succesfullly both cpu's, run cpu1 and then run cpu2 ( using the procedures, described by Vamsi), but when I stop debugging and only power off and up the delfino, no life shows from the pwm's. The same when I only connect, reset and start the cpu's.
    Suggestions would be very welcome.
  • 0 in reply to Henk Schutte
    TI__Guru* 87155 points

    Hi,

    1) You should be able to load symbols in CCS instead of loading the entire image.  In CCS debug window, try Run -> Load -> Load Symbols.

    2) When debugger is connected, you can load code to CPU2 memory and execute it if you want or keep the CPU in debug halt (just connect to CPU2 and don't run).  For standalone operation, you can make your CPU1 application to send a boot command to CPU2 to allow executing it's application code from your chosen boot mode as needed. For example, see blinky_dc project in controlsuite.  You will notice the function call "IPCBootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH)" in blinky_cpu01.c file.  This will send boot command to allow the CPU2 application to begin executing its code from Flash.      

    3) You should set boot mode GPIO pins to "boot to flash" option so that BootROM can jump to the application code that you programmed in Flash after a power cycle.

    Thanks and regards,

    Vamsi

  • 0 in reply to Vamsi Gudivada
    Intellectual 345 points
    Thanks, Vamsi.
    There should be another issue why all these things did not work.
    First, the IPCBootCPU2(flash) hangs in reading some bootstatus, which is 0 instead of 2.
    Second, I never could be able to debug and run Cpu2, after only loading the symbols; Cpu1, yes.
    But I am testing my new prototype board with the 337 bga's and I hope the manufacturing company connected all of them. (boot1 ,2 should be high). Anyway, debugging cpu2 is not too important, as the sources are almost finished and it is not completely impossible to debug cpu2
    Some small setting may be wrong. I am quite new in these, so sorry for bothering.
    I decided to concentrate on IPCBootCPU2() again as I removed it from the cpu1 source. Now the 2 cores started perfectly from power-up. Most likely, there was some memory issue in the cpu2.out as I also removed some functionality that I did not trust.
    Thanks again.
  • 0 in reply to Vamsi Gudivada
    Intellectual 365 points
    thanks a lot for your explanation！Seriously I feel very happy there are you guys who can solve our problems on the Internet.
    From a foreign engineer
  • 0 in reply to xiaoP
    TI__Expert 5940 points
    Glad to hear that we were able to help! Thanks for the feedback.

    Elizabeth