• State Resolved
  • Locked Locked
  • Replies 5 replies
  • Subscribers 82 subscribers
  • Views 1831 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Max SPI rate on non high speed SPI pins TMS320F28377

Jason Larkin
Intellectual 370 points
Other Parts Discussed in Thread: TMS320F28377S, TMS320F28377D

There are high speed SPI ports available on the TMS320F28377S which can do a maximum of 40MHz if some design guidelines are met.

Since you can configure a non highspeed SPI rate to be 50MHz (= max rate thru SPIBRR = max LSPCLK/4 = max SYSCLK/4 [default is SYSCLK/16] for a 200MHz SYSCLK), but this contradicts the need for a high speed SPI port which can do max 40MHz with design guidelines and shouldn't be the max speed of a non high speed SPI port.

I found one similar question but the answer is the same contradiction that is in the datasheet. Here they state that any GPIO max freq rate is 50MHz.

http://e2e.ti.com/support/microcontrollers/c2000/f/171/t/355840

Thanks in advance for the help,

Jason

  • 0
    TI__Guru** 116021 points

    Hi Jason,

    You could configure the non-highspeed SPI ports for 50MHz but that is not guaranteed to work at that speed becasue of timing. Hardware does not have restriction on what value is programmed for dividers. User need to make sure that the divider are configured in such a way that frq on non-highspeed SPI ports does not go beyond max operating speed (as mentioned in datasheet).

    Regards,

    Vivek Singh

  • 0 in reply to Vivek Singh
    Intellectual 370 points
    Thanks Vivek,
    The datasheet tms320f28377s.pdf doesnt list the max operating speed for the non highspeed SPI ports (or anything else).
    If Im missing it can you point me to it?
    I looked several times.

    Thanks,
    Jason
  • 0 in reply to Jason Larkin
    TI__Guru** 116021 points

    Hi Jason,

    Datasheet has the timing information like SETUP/HOLD time which puts the restriction on the max operating frq for each interface. The max limit for the non-hispeed SPI port is 25MHz but depending on what user is interfacing with, max limit on their system could be less than that. I'll provide your feedback to team to include  the max operating frq limit for non-hispeed SPI port also in datasheet.

    Regards,

    Vivek Singh 

  • 0 in reply to Vivek Singh
    Intellectual 370 points
    Ok, thanks.
    I see that in the dual core processor datasheet but not the single core.
    Is everything not related to the dual core in TMS320F28377D datasheet valid for whats not in TMS320F28377S datasheet?
    Like it is for this SPI timing topic.
  • 0 in reply to Jason Larkin
    TI__Guru** 116021 points

    Jason,

    Yes, SPI timing mentioned in dual core device datasheet will be valid for single core device as well.

    Regards,

    Vivek Singh