I am trying to use shared RAM for message passing between the cores on the F28M35x. Specifically in this case, I am passing messages from the M3 to the C28 and using variables allocated to the MTOCRAM section.
I have multiple variables that are being passed. However, it appears that in actual usage, the allocation order is different on the two cores, even though they are declared in the same order on both cores. The result is that variableA gets put where I thought variableB would be, and vice versa. So, is there a defined way that memory is mapped, or is the order undefined?
C28 Code:
#pragma DATA_SECTION("MtoC")
Int32 SrCommand = 0;
#pragma DATA_SECTION("MtoC")
Int32 SrCommandValue = 0;
C28 Memory Map:
0003fc00 ff0 (0003fc00) _SrCommandValue 0003fc02 ff0 (0003fc00) _SrCommand
M3 Code:
#pragma DATA_SECTION("MtoC")
Int32 SrCommand = 0;
#pragma DATA_SECTION("MtoC")
Int32 SrCommandValue = 0;
M3 Memory Map:
2007f800 SrCommand 2007f804 SrCommandValue
Note how both are declared in the same order, but the C28 allocated them in reverse order in the MtoCRAM section.
Am I doing something incorrect? Is there no expectation to how the variables are allocated based on declaration order?
