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Shadow registers - TMS320F28027



Active Register --> Direct hardware access

Shadow Register --> No hardware access, temporary holding location for active register

When the counter reaches zero, the content from the shadow register is transferred to the active register. The microcontroller skips one cycle to update the counter in immediate load mode and in shadow mode it works fine.

Someone please explain what is happening here.

Note : The switching frequency is 100Hz. So one cycle delay can da a lot of damage.

  • Prakash,

    When you update a PWM configuration in immediate mode you typically have no idea where in the PWM cycle your write takes place. For example, a write to a compare register may occur after the time-base counter has already passed the new comparator value, so a timer-comparator match will not happen until the next PWM cycle. Shadow registers exist to prevent this. As you said, when you write to a shadow register you know the new value will be updated at a deterministic point in the PWM cycle (zero match, period match, or both).

    Regards,

    Richard