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ADC chanel interface of TMS320F28377D

shivkant sharma
Prodigy 100 points
Other Parts Discussed in Thread: TMS320F28335

Hello,

I have one doubt related to Analog to Digital Converter of TMS320F28377D.

I am using a 3V external ADC reference. i am putting a voltage follower circuit using LMP7709 in the ADC path.

My question is what should be the load resistor (in the output of opamp) and capacitor value for proper functioning of ADC. ADC input satge of TMS320F28377D is not given in TRM.

Do these resistor and capacitor value affect the ADC accuracy?

Thanks

  • 0
    TI__Guru 60865 points
    Hi Shivkant,

    These tend to be very application specific. Larger C and R values will act as a low-pass filter. This can be helpful for rejecting higher frequency noise, but larger values also reduce the bandwidth. If the bandwidth is lower, settling will also be slower, so you may need to increase the S+H duration by adjusting the ACQPS setting. The best way to determine the ACQPS setting by simulating the settling of the input in SPICE, along with the input models provided in the datasheet.
  • 0 in reply to Devin Cottier
    Prodigy 100 points

    Hi Devin,

    Thanks for clarification.  I have gone trough the hardware design document of TMS320F28335 and it is mentioned that suggested R value should be less than 100 Ohm, and C value 22pF.

    so is there any upper limit on putting a higher value resistor. My sensing signal fundamental frequency is 200Hz and it contains switching component of 5kHz.

    Thanks

  • 0 in reply to shivkant sharma
    TI__Guru 60865 points
    Hi Shivkant,

    The specifics of the F28335 HW design guide won't apply to F2837x devices (although the general principles will usually apply).

    Take a look at the ADC input model in the F2837xD datasheet. This is under the section "ADC Input Models". When selecting the S+H duration for the ADC, the goal is to get Ch to charge to within 1/2LSB (or sometimes 1/4 LSBs) of its final value during the selected S+H duration with the following conditions: The input voltage source = DC = VREFHI. Initial charge on Cp = VREFHI. Initial charge on any external capacitance added in parallel with Cp = VREFHI. Initial charge on Ch = 0V.

    Once you have the above setup in SPICE, you can simulate the transient response with the switch being closed for the selected S+H duration and then observe the final voltage on Ch. I would recommend observing (DC input voltage - Ch voltage), as it will be easier to see a small voltage like 1/2LSBs.

    When the input circuit is simply an R-C, you can also use a variety of formulas to estimate the required settling time. One estimate is that the time constant will be (Rs+Ron)*Ch + Rs*Cp. (Cp is the Cp specified in the datasheet, plus whatever you add on the PCB at the ADC input, plus probably another pF or two for board parasitics). You will need -ln(0.5*(1/4096)) = 9 time constants for 1/2LSB settling at 12-bit resolution.

    Smaller R and C values will allow faster settling. It's ok to make the R and/or C larger to get a lower cutoff for the LP filter (sometimes also called an anti-aliasing filter if you set the cutoff such that only first Nyquist zone frequencies are not attenuated), but this will require a longer S+H window. There is a limit to how long you can set the S+H window (ACQPS max setting is 511) and increasing S+H duration will reduce the sample rate and increase the sample-to-output latency.