On TMS320F2837xD technical reference manual, it mentioned that "When using PWM11 (or) PWM12 for SDFM filter synchronization, users MUST ensure that ONLY ONE CMPC (or) CMPD event will be generated per PWM time period" as shown below.
In my opinion, the CMPC or CMPD event is just to synchronize the SDFM filter. Considering the following case, using PWM in up-down count mode, and two CMPC events are generated in one PWM timer period, but the time between these two CPMC events are long enough to make sure the SDFM has new data available.
In this case, will the SDFM timing still be corrupted by two pulses per PWM cycle? If yes, what's the inner relationship between PWM timing and SDFM timing?
