Migrate a project from TMS320F28016 to TMS320F2802

user4728038

Other Parts Discussed in Thread: TMS320F28016, TMS320F2802

Hi all.

I have a device created with the TMS320F28016, and now i have not enought memory, so i am using now the TMS320F2802.

I want to migrate the ccv6 project from the old mcu to the new;

   * I have configurated all the project details to work with the new mcu.

   * I have imported the F2802.cmd and i have indicated the program to use it.

   * I have imported the F2802.gel file and i have erased the old one (not indicating the program to use the new one).

I am using the XDS100v2, and i can program correctly the device. But when i want to use it, everything work wrong.
I guess that it is a problem with the memory allocation, but i can't understand what i am doing wrong.

Where can i indicate the ccv6 to use the new .gel?
Should i change any other file more than F28016.cmd ->F2802.cmd and F28016.gel->F2802.gel?
have i got to erase any old file?

-------------------------------------------------

Other thing that happens to me is that when i am using ccv3 with the F28016 mcu everything run ok. But when i use the ccv6 i have to optimize the memory, because the code doesn't fit in memory. But when i do it..... it happens the same than when i use the 2802 mcu... everything work wrong. So now i am using the 28016 mcu with the ccv6 without any memory optimization, and i am eliminating code.......

Any help please ??

over 7 years ago

0 Richard Poley over 7 years ago

TI__Mastermind 27200 points

F28016 to F2802 should be a straightforward migration. Apart from a linker file change to take advantage of the larger flash, no other project changes should be necessary.

You can specify GEL files in the Debug perspective in CCSv6. After you have connected the target, go to "Tools -> GEL files", then right-click in the GEL window and select "Load GEL..."

Can you elaborate on "everything work wrong" please - what exactly is not working?

Regards,

Richard

0 user4728038 over 7 years ago in reply to Richard Poley

Prodigy 70 points

Tnaks so much Richard.

I will try to explain my problem properly

My system basically moves a brushless motor, and it communicates with the CAN bus.

I am using CCv6 & XDS100v2

When I use F28016 with memory optimization (because if not, the .text doesn't fit in flash):

The PWM isn't generated properly, and the motor moves with problems.

When I use F2802 with out memory optimization (it is not needed)

The PWM isn't generated properly, and the motor moves with problems.
The system doesn't manage CAN information properly.

I have used the CCv6 F28016 project. I have changed the MUC family to F2802, the emulator to XDS100v2, the linker file to F2802.cmd file and when I send the code, i choose the F2802.gel file.

I have made some changes in the F2802.cmd file, because the .text section doesn't fit in flash and .ebbs section doesn't fit in RAM. So i have put together flash A, B and C -> in D and i put .ebbs in RAMM0 | RAMM1.

I have noticed that the "memory map" area in the oficial F2802 .gel file is different to the memory mapping used in the F2802.cmd file.

Do you think that it is a memory problem (i.e. something is happening with the timers) caused by the maping? or it is a problem with the project configurations?

Thanks!

0 Richard Poley over 7 years ago in reply to user4728038

TI__Mastermind 27200 points

Thank you for the additional information.

Did the original F28016 code ever drive the motor correctly without optimization?

If so, from your description I'm inclined toward the view it's related to the optimizer, but let's check the linker first. Could you send the F2802 linker file, either pasted into the post or attached as a .txt file please?

Thanks.

Regards,

Richard

0 user4728038 over 7 years ago in reply to Richard Poley

Prodigy 70 points

Hi again Richard.

Yes, my system worked perfect in F28016 without optimization. However, now, in F2802 i am not using any optimization (because i don't need it). But the system seems doesn't work correctly.

This is the F2802.cmd that i am using. As you can see i have introduce some litle changes to let the program .ebss and .IQmath sectors fit in memory: basicaly i have glue the flash C, B and D ---> in D, and i have used RAMM0 and RAMM1 for ebss.

------------------------------------------------------------------------------------

/*
// TI File $Revision: /main/2 $
// Checkin $Date: August 2, 2006   16:56:57 $
//###########################################################################
//
// FILE:	F2802.cmd
//
// TITLE:	Linker Command File For F2802 Device
//
//###########################################################################
// $TI Release:$
// $Release Date:$
//###########################################################################
*/

/* ======================================================
// For Code Composer Studio V2.2 and later
// ---------------------------------------
// In addition to this memory linker command file, 
// add the header linker command file directly to the project. 
// The header linker command file is required to link the
// peripheral structures to the proper locations within 
// the memory map.
//
// The header linker files are found in <base>\DSP280x_Headers\cmd
//   
// For BIOS applications add:      DSP280x_Headers_BIOS.cmd
// For nonBIOS applications add:   DSP280x_Headers_nonBIOS.cmd    
========================================================= */

/* ======================================================
// For Code Composer Studio prior to V2.2
// --------------------------------------
// 1) Use one of the following -l statements to include the 
// header linker command file in the project. The header linker
// file is required to link the peripheral structures to the proper 
// locations within the memory map                                    */

/* Uncomment this line to include file only for non-BIOS applications */
/* -l DSP280x_Headers_nonBIOS.cmd */

/* Uncomment this line to include file only for BIOS applications */
/* -l DSP280x_Headers_BIOS.cmd */

/* 2) In your project add the path to <base>\DSP280x_headers\cmd to the
   library search path under project->build options, linker tab, 
   library search path (-i).
/*========================================================= */

/* Define the memory block start/length for the F2806  
   PAGE 0 will be used to organize program sections
   PAGE 1 will be used to organize data sections

   Notes: 
         Memory blocks on F2802 are uniform (ie same
         physical memory) in both PAGE 0 and PAGE 1.  
         That is the same memory region should not be
         defined for both PAGE 0 and PAGE 1.
         Doing so will result in corruption of program 
         and/or data. 
         
         L0 memory block is mirrored - that is
         it can be accessed in high memory or low memory.
         For simplicity only one instance is used in this
         linker file. 

         Flash sectors can be combined if required. 
*/

MEMORY
{
PAGE 0:    /* Program Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */

   RAML0       : origin = 0x008000, length = 0x001000     /* on-chip RAM block L0 */
   OTP         : origin = 0x3D7800, length = 0x000400     /* on-chip OTP */
   FLASHD      : origin = 0x3F0000, length = 0x006000     /* on-chip FLASH */ /*Before: 2000*/
  /* FLASHC      : origin = 0x3F2000, length = 0x002000  */   /* on-chip FLASH */ /* Changes */
   FLASHA      : origin = 0x3F6000, length = 0x001F80     /* on-chip FLASH *//*Before  FLASHA      : origin = 0x3F6000, length = 0x001F80*/
   CSM_RSVD    : origin = 0x3F7F80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
   BEGIN       : origin = 0x3F7FF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
   CSM_PWL     : origin = 0x3F7FF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */
   
   ROM         : origin = 0x3FF000, length = 0x000FC0     /* Boot ROM */
   RESET       : origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM  */
   VECTORS     : origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM  */

PAGE 1 :   /* Data Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
           /* Registers remain on PAGE1                                                  */

   RAMM0       : origin = 0x000000, length = 0x000400     /* on-chip RAM block M0 */
   BOOT_RSVD   : origin = 0x000400, length = 0x000080     /* Part of M1, BOOT rom will use this for stack */
   RAMM1       : origin = 0x000480, length = 0x000380     /* on-chip RAM block M1 */
   /*FLASHB      : origin = 0x3F4000, length = 0x002000  */   /* on-chip FLASH */ /*CHANGES*/
}

/* Allocate sections to memory blocks.
   Note:
         codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code 
                   execution when booting to flash
         ramfuncs  user defined section to store functions that will be copied from Flash into RAM
*/ 
 
SECTIONS
{
 
   /* Allocate program areas: */
   .cinit              : > FLASHD      PAGE = 0     /*Before: A*/
   .pinit              : > FLASHD,     PAGE = 0     /*Before: A*/
   .text               : > FLASHD      PAGE = 0     /*Before:  C*/
   codestart           : > BEGIN       PAGE = 0
   ramfuncs            : LOAD = FLASHA, /*Before: D*/
                         RUN = RAML0, 
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         PAGE = 0

   csmpasswds          : > CSM_PWL     PAGE = 0
   csm_rsvd            : > CSM_RSVD    PAGE = 0
   
   /* Allocate uninitalized data sections: */
   .stack              : > RAMM0       PAGE = 1
   .ebss               :{*(.ebss)} >> RAMM0 | RAMM1  /* antes :> RAMM1  PAGE = 1*/ /* CHANGES*/
   .esysmem            : > RAMM1       PAGE = 1

   /* Initalized sections go in Flash */
   /* For SDFlash to program these, they must be allocated to page 0 */
   .econst             : > FLASHA      PAGE = 0
   .switch             : > FLASHA      PAGE = 0      

   /* Allocate IQ math areas: */
   IQmath              : > FLASHD      PAGE = 0                  /* Math Code */ /*antes C*/
   IQmathTables        : > ROM         PAGE = 0, TYPE = NOLOAD   /* Math Tables In ROM */

   /* .reset is a standard section used by the compiler.  It contains the */ 
   /* the address of the start of _c_int00 for C Code.   /*
   /* When using the boot ROM this section and the CPU vector */
   /* table is not needed.  Thus the default type is set here to  */
   /* DSECT  */ 
   .reset              : > RESET,      PAGE = 0, TYPE = DSECT
   vectors             : > VECTORS     PAGE = 0, TYPE = DSECT

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

Thank you so much!

0 Richard Poley over 7 years ago in reply to user4728038

TI__Mastermind 27200 points

The only linker change which concerns me is sharing M0 with .stack and .ebss. Did you do this because M1 was too small to hold the .ebss section?

If so, can you try to split the L0 section in half, so that the low 2Kw holds "ramfuncs" and other 2kw holds .ebss? I don't know how big the "ramfuncs" section is, but if you can do this it would remove any possibility of the stack over-writing program variables. The relevant lines of your linker file would look like this:

MEMORY
{
PAGE 0: /* Program Memory */
/* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */

RAML0L : origin = 0x008000, length = 0x000800 /* on-chip RAM block L0 */

PAGE 1 :   /* Data Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
           /* Registers remain on PAGE1                                                  */

   RAMM0       : origin = 0x000000, length = 0x000400     /* on-chip RAM block M0 */
   BOOT_RSVD   : origin = 0x000400, length = 0x000080     /* Part of M1, BOOT rom will use this for stack */
   RAMM1       : origin = 0x000480, length = 0x000380     /* on-chip RAM block M1 */
   RAML0H       : origin = 0x008800, length = 0x000800     /* on-chip RAM block L0 */
   /*FLASHB      : origin = 0x3F4000, length = 0x002000 */   /* on-chip FLASH */ /*CHANGES*/
}

SECTIONS
{

   /* Allocate program areas: */
   .cinit              : > FLASHD      PAGE = 0     /*Before: A*/
   .pinit              : > FLASHD,     PAGE = 0     /*Before: A*/
   .text               : > FLASHD      PAGE = 0     /*Before: C*/
   codestart           : > BEGIN       PAGE = 0
   ramfuncs            : LOAD = FLASHA, /*Before: D*/
                         RUN = RAML0L,
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         PAGE = 0

   csmpasswds          : > CSM_PWL     PAGE = 0
   csm_rsvd            : > CSM_RSVD    PAGE = 0

   /* Allocate uninitalized data sections: */
   .stack              : > RAMM0       PAGE = 1
   .ebss               : > RAML0H       PAGE = 1
   .esysmem            : > RAMM1       PAGE = 1

   /* Initalized sections go in Flash */
   /* For SDFlash to program these, they must be allocated to page 0 */
   .econst             : > FLASHA      PAGE = 0
   .switch             : > FLASHA      PAGE = 0

   /* Allocate IQ math areas: */
   IQmath              : > FLASHD      PAGE = 0                  /* Math Code */ /*antes C*/
   IQmathTables        : > ROM         PAGE = 0, TYPE = NOLOAD   /* Math Tables In ROM */

   /* .reset is a standard section used by the compiler. It contains the */
   /* the address of the start of _c_int00 for C Code.   /*
   /* When using the boot ROM this section and the CPU vector */
   /* table is not needed. Thus the default type is set here to */
   /* DSECT */
   .reset              : > RESET,      PAGE = 0, TYPE = DSECT
   vectors             : > VECTORS     PAGE = 0, TYPE = DSECT

}

Regards,

Richard

0 user4728038 over 7 years ago in reply to Richard Poley

Prodigy 70 points

Hi again Richard.

With the configuration that you said i got the following issues:

ramfungs lenght is 0xde9

ebss lenght is 0x37d

Total needed: 4455

So it doesn't fit in memory.

With the previous configuration everything fit in memory:

RAML0 3561/4096
RAMM0 1023/1024
RAMM1 446/896

The memory mapping i sent you is the one that i have been using for the F28016. And everything worked ok.

should i use this configuration to don't share ebss and stack ? :

   .stack              : > RAMM0       PAGE = 1
   .ebss               : > RAMM1       PAGE = 1
   .esysmem      : > RAMM0       PAGE = 1

-------------------------------------more information:-----------------------------------

These are the steps i am following to change the MCU enviroment:

"Copy and paste" the entire workspace folder of the F28016 project -> Change the project properties to: F2802 (General properties) and choose the "linker command file" i sent to you (Copied and pasted in the workspace folder) -> Compile -> Send

Should i change the DSP280x_Headers_nonBIOS.cmd, the F28016.gel or any other file that is remaining from the other project in the folders of the new one ?

Thank you so much (really)

Regards

0 Richard Poley over 7 years ago in reply to user4728038

TI__Mastermind 27200 points

OK, thanks. I didn't know the 'ramfuncs' section was taking this much memory. Please do try your .stack & .ebss allocation above and let me know if it works. I note .ebss will just fit in RAMM1, so hopefully you don't have any dynamic memory allocation (.esysmem is 0).

It should not be necessary to change the header .cmd file, but you should change the GEL file from F28016 to F2802.

Please try these things first. If the problem persists we need to look into the code.

Regards,

Richard

0 user4728038 over 7 years ago in reply to Richard Poley

Prodigy 70 points

Ok, this is the code i am using now (following your tips):

/*
// TI File $Revision: /main/2 $
// Checkin $Date: August 2, 2006   16:56:55 $
//###########################################################################
//
// FILE:	F2802.cmd
//
// TITLE:	Linker Command File For F28016 Device
//
//###########################################################################
// $TI Release: DSP280x Header Files V1.50 $
// $Release Date: September 10, 2007 $
//###########################################################################
*/

/* ======================================================
// For Code Composer Studio V2.2 and later
// ---------------------------------------
// In addition to this memory linker command file, 
// add the header linker command file directly to the project. 
// The header linker command file is required to link the
// peripheral structures to the proper locations within 
// the memory map.
//
// The header linker files are found in <base>\DSP280x_Headers\cmd
//   
// For BIOS applications add:      DSP280x_Headers_BIOS.cmd
// For nonBIOS applications add:   DSP280x_Headers_nonBIOS.cmd    
========================================================= */

/* ======================================================
// For Code Composer Studio prior to V2.2
// --------------------------------------
// 1) Use one of the following -l statements to include the 
// header linker command file in the project. The header linker
// file is required to link the peripheral structures to the proper 
// locations within the memory map                                    */

/* Uncomment this line to include file only for non-BIOS applications */
/* -l DSP280x_Headers_nonBIOS.cmd */

/* Uncomment this line to include file only for BIOS applications */
/* -l DSP280x_Headers_BIOS.cmd */

/* 2) In your project add the path to <base>\DSP280x_headers\cmd to the
   library search path under project->build options, linker tab, 
   library search path (-i).
/*========================================================= */

/* Define the memory block start/length for the F28016  
   PAGE 0 will be used to organize program sections
   PAGE 1 will be used to organize data sections

   Notes: 
         Memory blocks on F28016 are uniform (ie same
         physical memory) in both PAGE 0 and PAGE 1.  
         That is the same memory region should not be
         defined for both PAGE 0 and PAGE 1.
         Doing so will result in corruption of program 
         and/or data. 
         
         L0 memory block is mirrored - that is
         it can be accessed in high memory or low memory.
         For simplicity only one instance is used in this
         linker file. 
         
         Contiguous SARAM memory blocks or flash sectors can be
         be combined if required to create a larger memory block. 
*/

MEMORY
{
PAGE 0:    /* Program Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */
   RAML0L       : origin = 0x008000, length = 0x000C76     /* on-chip RAM block L0 */ //NFF creo estas dos RAML0 para independizar el stack y el .ebss
   OTP         : origin = 0x3D7800, length = 0x000400     /* on-chip OTP */
   FLASHD      : origin = 0x3F0000, length = 0x006A00     /* on-chip FLASH */ /* antes 0x3F4000*/
   /*FLASHC      : origin = 0x3F5000, length = 0x001000  */   /* on-chip FLASH */
   FLASHA      : origin = 0x3F6A00, length = 0x001580     /* on-chip FLASH */ /* antes 0x3F7000 length = 0x000F80 */
   CSM_RSVD    : origin = 0x3F7F80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
   BEGIN       : origin = 0x3F7FF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
   CSM_PWL     : origin = 0x3F7FF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */
   
   ROM         : origin = 0x3FF000, length = 0x000FC0     /* Boot ROM */
   RESET       : origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM  */
   VECTORS     : origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM  */

PAGE 1 :   /* Data Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
           /* Registers remain on PAGE1                                                  */

   RAMM0       : origin = 0x000000, length = 0x000400     /* on-chip RAM block M0 */
   BOOT_RSVD   : origin = 0x000400, length = 0x000080     /* Part of M1, BOOT rom will use this for stack */
   RAMM1       : origin = 0x000480, length = 0x000380     /* on-chip RAM block M1 */
   RAML0H      : origin = 0x008C76, length = 0x00038A     /* on-chip RAM block L0 */
/*   FLASHB      : origin = 0x3F6000, length = 0x001000 */    /* on-chip FLASH */
}

/* Allocate sections to memory blocks.
   Note:
         codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code 
                   execution when booting to flash
         ramfuncs  user defined section to store functions that will be copied from Flash into RAM
*/ 
 
SECTIONS
{
 
   /* Allocate program areas: */
   .cinit              : > FLASHD      PAGE = 0
   .pinit              : > FLASHD      PAGE = 0
   .text               : > FLASHD      PAGE = 0
   codestart           : > BEGIN       PAGE = 0
   ramfuncs            : LOAD = FLASHA,
                         RUN = RAML0L, //NFF
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         PAGE = 0

   csmpasswds          : > CSM_PWL     PAGE = 0
   csm_rsvd            : > CSM_RSVD    PAGE = 0
   
   /* Allocate uninitalized data sections: */

   .ebss			   : > RAML0H       PAGE=1
   .esysmem            : > RAMM1       PAGE = 1
   .stack              : > RAMM0       PAGE = 1  // NFF antes RAMM1

   /* Initalized sections go in Flash */
   /* For SDFlash to program these, they must be allocated to page 0 */
   .econst             : > FLASHA      PAGE = 0
   .switch             : > FLASHA      PAGE = 0      

   /* Allocate IQ math areas: */
   IQmath              :{*(IQmath)} >> FLASHD       PAGE = 0                  /* Math Code */ //NFF antes FLASD
   IQmathTables        : > ROM         PAGE = 0, TYPE = NOLOAD   /* Math Tables In ROM */

   /* .reset is a standard section used by the compiler.  It contains the */ 
   /* the address of the start of _c_int00 for C Code.   /*
   /* When using the boot ROM this section and the CPU vector */
   /* table is not needed.  Thus the default type is set here to  */
   /* DSECT  */ 
   .reset              : > RESET,      PAGE = 0, TYPE = DSECT
   vectors             : > VECTORS     PAGE = 0, TYPE = DSECT

}

/*
//===========================================================================
// No more.
//===========================================================================
*/

I am controlling a brushless motor (with 6 PWM signals). And it is still doing strange stuff ( strange velocities... etc ).

This is the code i am using for the F28016 MCU and everything is working perfectly! :

/*
// TI File $Revision: /main/2 $
// Checkin $Date: August 2, 2006   16:56:55 $
//###########################################################################
//
// FILE:	F28016.cmd
//
// TITLE:	Linker Command File For F28016 Device
//
//###########################################################################
// $TI Release: DSP280x Header Files V1.50 $
// $Release Date: September 10, 2007 $
//###########################################################################
*/

/* ======================================================
// For Code Composer Studio V2.2 and later
// ---------------------------------------
// In addition to this memory linker command file, 
// add the header linker command file directly to the project. 
// The header linker command file is required to link the
// peripheral structures to the proper locations within 
// the memory map.
//
// The header linker files are found in <base>\DSP280x_Headers\cmd
//   
// For BIOS applications add:      DSP280x_Headers_BIOS.cmd
// For nonBIOS applications add:   DSP280x_Headers_nonBIOS.cmd    
========================================================= */

/* ======================================================
// For Code Composer Studio prior to V2.2
// --------------------------------------
// 1) Use one of the following -l statements to include the 
// header linker command file in the project. The header linker
// file is required to link the peripheral structures to the proper 
// locations within the memory map                                    */

/* Uncomment this line to include file only for non-BIOS applications */
/* -l DSP280x_Headers_nonBIOS.cmd */

/* Uncomment this line to include file only for BIOS applications */
/* -l DSP280x_Headers_BIOS.cmd */

/* 2) In your project add the path to <base>\DSP280x_headers\cmd to the
   library search path under project->build options, linker tab, 
   library search path (-i).
/*========================================================= */

/* Define the memory block start/length for the F28016  
   PAGE 0 will be used to organize program sections
   PAGE 1 will be used to organize data sections

   Notes: 
         Memory blocks on F28016 are uniform (ie same
         physical memory) in both PAGE 0 and PAGE 1.  
         That is the same memory region should not be
         defined for both PAGE 0 and PAGE 1.
         Doing so will result in corruption of program 
         and/or data. 
         
         L0 memory block is mirrored - that is
         it can be accessed in high memory or low memory.
         For simplicity only one instance is used in this
         linker file. 
         
         Contiguous SARAM memory blocks or flash sectors can be
         be combined if required to create a larger memory block. 
*/

MEMORY
{
PAGE 0:    /* Program Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */
   RAML0L       : origin = 0x008000, length = 0x000F00     /* on-chip RAM block L0 */ //NFF creo estas dos RAML0 para independizar el stack y el .ebss
   OTP         : origin = 0x3D7800, length = 0x000400     /* on-chip OTP */
   FLASHD      : origin = 0x3F4000, length = 0x002F5D     /* on-chip FLASH */ /* antes 0x3F4000*/
   /*FLASHC      : origin = 0x3F5000, length = 0x001000  */   /* on-chip FLASH */
   FLASHA      : origin = 0x3F6F5D, length = 0x001023     /* on-chip FLASH */ /* antes 0x3F7000 length = 0x000F80 */
   CSM_RSVD    : origin = 0x3F7F80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
   BEGIN       : origin = 0x3F7FF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
   CSM_PWL     : origin = 0x3F7FF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */
   
   ROM         : origin = 0x3FF000, length = 0x000FC0     /* Boot ROM */
   RESET       : origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM  */
   VECTORS     : origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM  */

PAGE 1 :   /* Data Memory */
           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
           /* Registers remain on PAGE1                                                  */

   RAMM0       : origin = 0x000000, length = 0x000400     /* on-chip RAM block M0 */
   BOOT_RSVD   : origin = 0x000400, length = 0x000080     /* Part of M1, BOOT rom will use this for stack */
   RAMM1       : origin = 0x000480, length = 0x000380     /* on-chip RAM block M1 */
   RAML0H      : origin = 0x008F00, length = 0x000100     /* on-chip RAM block L0 */
/*   FLASHB      : origin = 0x3F6000, length = 0x001000 */    /* on-chip FLASH */
}

/* Allocate sections to memory blocks.
   Note:
         codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code 
                   execution when booting to flash
         ramfuncs  user defined section to store functions that will be copied from Flash into RAM
*/ 
 
SECTIONS
{
 
   /* Allocate program areas: */
   .cinit              : > FLASHD      PAGE = 0
   .pinit              : > FLASHD      PAGE = 0
   .text               : > FLASHD      PAGE = 0
   codestart           : > BEGIN       PAGE = 0
   ramfuncs            : LOAD = FLASHA,
                         RUN = RAML0L, //NFF
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         PAGE = 0

   csmpasswds          : > CSM_PWL     PAGE = 0
   csm_rsvd            : > CSM_RSVD    PAGE = 0
   
   /* Allocate uninitalized data sections: */

   .ebss			:{*(.ebss)} >> RAMM0 | RAMM1
   .esysmem            : > RAMM1       PAGE = 1
   .stack              : > RAML0H       PAGE = 1  // NFF antes RAMM1

   /* Initalized sections go in Flash */
   /* For SDFlash to program these, they must be allocated to page 0 */
   .econst             : > FLASHA      PAGE = 0
   .switch             : > FLASHA      PAGE = 0      

   /* Allocate IQ math areas: */
   IQmath              :{*(IQmath)} >> FLASHD | FLASHA      PAGE = 0                  /* Math Code */ //NFF antes FLASD
   IQmathTables        : > ROM         PAGE = 0, TYPE = NOLOAD   /* Math Tables In ROM */

   /* .reset is a standard section used by the compiler.  It contains the */ 
   /* the address of the start of _c_int00 for C Code.   /*
   /* When using the boot ROM this section and the CPU vector */
   /* table is not needed.  Thus the default type is set here to  */
   /* DSECT  */ 
   .reset              : > RESET,      PAGE = 0, TYPE = DSECT
   vectors             : > VECTORS     PAGE = 0, TYPE = DSECT

}

/*
//===========================================================================
// No more.
//===========================================================================
*/

If i use the same code (that one tha is working in the F28016MCU) (just changing the Flash mapping) ... the F2802 MCU doesn't work... why?...

If i use the new code, it doesn't work againg...

Is the F2802 pin compatible with the F28016 MCU?

Are all the registers, and propierties the same?

Is there any other file that is created automatically by the old F28016 project and is still in the folder?

Tnaks a lot!

0 Richard Poley over 7 years ago in reply to user4728038

TI__Mastermind 27200 points

I'm not seeing anything in the linker file which causes concern. Can you try a couple of things;

1) Does the project still fit in memory with the optimizer turned off? If so, can you try that?

2) Can you try to open and run one of the example F280x projects on your F2802 device, just to ensure we don't have a device problem?

If you don't already have them, there are examples at: http://www.ti.com/tool/sprc191

Thanks.

Regards,

Richard

C2000™︎ microcontrollers

C2000 microcontrollers forum

Migrate a project from TMS320F28016 to TMS320F2802