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eCAN Bootload İssue

Hello,

I try to bootload F28335 through eCAN and load my application code into flash of F28335 and I found  an example code for this purpose . But, I could not receive data through eCAN by polling method.

CPU waits on this line :

while(ECanaRegs.CANRMP.all == 0) { }

Function that receives data through CAN is :

Uint16 CAN_GetWordData()
{
Uint16 wordData;
Uint16 byteData;

wordData = 0x0000;
byteData = 0x0000;

// Fetch the LSB
while(ECanaRegs.CANRMP.all == 0) { }
wordData = (Uint16) ECanaMboxes.MBOX1.MDL.byte.BYTE0; // LS byte

// Fetch the MSB

byteData = (Uint16)ECanaMboxes.MBOX1.MDL.byte.BYTE1; // MS byte

// form the wordData from the MSB:LSB
wordData |= (byteData << 8);

/* Clear all RMPn bits */

ECanaRegs.CANRMP.all = 0xFFFFFFFF;

return wordData;

}

CAN initialization function :

void CAN_Init()
{

/* Create a shadow register structure for the CAN control registers. This is
needed, since only 32-bit access is allowed to these registers. 16-bit access
to these registers could potentially corrupt the register contents or return
false data. This is especially true while writing to/reading from a bit
(or group of bits) among bits 16 - 31 */

struct ECAN_REGS ECanaShadow;

EALLOW;

/* Enable CAN clock */

SysCtrlRegs.PCLKCR0.bit.ECANAENCLK=1;

/* Configure eCAN-A pins using GPIO regs*/

GpioCtrlRegs.GPAMUX2.bit.GPIO30 = 1; // GPIO30 is CANRXA
GpioCtrlRegs.GPAMUX2.bit.GPIO31 = 1; // GPIO31 is CANTXA

/* Enable internal pullups for the CAN pins */

GpioCtrlRegs.GPAPUD.bit.GPIO30 = 0;
GpioCtrlRegs.GPAPUD.bit.GPIO31 = 0;

/* Asynch Qual */

GpioCtrlRegs.GPAQSEL2.bit.GPIO30 = 3;

/* Configure eCAN RX and TX pins for CAN operation using eCAN regs*/

ECanaShadow.CANTIOC.all = ECanaRegs.CANTIOC.all;
ECanaShadow.CANTIOC.bit.TXFUNC = 1;
ECanaRegs.CANTIOC.all = ECanaShadow.CANTIOC.all;

ECanaShadow.CANRIOC.all = ECanaRegs.CANRIOC.all;
ECanaShadow.CANRIOC.bit.RXFUNC = 1;
ECanaRegs.CANRIOC.all = ECanaShadow.CANRIOC.all;

/* Initialize all bits of 'Message Control Register' to zero */
// Some bits of MSGCTRL register come up in an unknown state. For proper operation,
// all bits (including reserved bits) of MSGCTRL must be initialized to zero

ECanaMboxes.MBOX1.MSGCTRL.all = 0x00000000;

/* Clear all RMPn, GIFn bits */
// RMPn, GIFn bits are zero upon reset and are cleared again as a precaution.

ECanaRegs.CANRMP.all = 0xFFFFFFFF;

/* Clear all interrupt flag bits */

ECanaRegs.CANGIF0.all = 0xFFFFFFFF;
ECanaRegs.CANGIF1.all = 0xFFFFFFFF;

/* Configure bit timing parameters for eCANA*/

ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
ECanaShadow.CANMC.bit.CCR = 1 ; // Set CCR = 1
ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;

ECanaShadow.CANES.all = ECanaRegs.CANES.all;

do
{
ECanaShadow.CANES.all = ECanaRegs.CANES.all;
} while(ECanaShadow.CANES.bit.CCE != 1 ); // Wait for CCE bit to be set..

ECanaShadow.CANBTC.all = 0;

ECanaShadow.CANBTC.bit.BRPREG = 0;
ECanaShadow.CANBTC.bit.TSEG2REG = 2;
ECanaShadow.CANBTC.bit.TSEG1REG = 10;

ECanaShadow.CANBTC.bit.SAM = 1;
ECanaRegs.CANBTC.all = ECanaShadow.CANBTC.all;

ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
ECanaShadow.CANMC.bit.CCR = 0 ; // Set CCR = 0
ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;

ECanaShadow.CANES.all = ECanaRegs.CANES.all;

do
{
ECanaShadow.CANES.all = ECanaRegs.CANES.all;
} while(ECanaShadow.CANES.bit.CCE != 0 ); // Wait for CCE bit to be cleared..

/* Disable all Mailboxes */

ECanaRegs.CANME.all = 0; // Required before writing the MSGIDs

/* Assign MSGID to MBOX1 */

ECanaMboxes.MBOX1.MSGID.all = 0x00040000; // Standard ID of 1, Acceptance mask disabled

/* Configure MBOX1 to be a receive MBOX */

ECanaRegs.CANMD.all = 0x0002;

/* Enable MBOX1 */

ECanaRegs.CANME.all = 0x0002;

EDIS;

return;
}

so What is my fault ? Any help will be appreciated.

Thanks in advance

Sertac 

  • Sertac,

    I presume the code snippets you have provided are from the boot-ROM of the device. The first thing you need to verify is that there are no hardware issues. Are you sure data is transmitted by the host? And at the expected bit-rate? Please verify this with the help of an oscilloscope.

  • Hi Hareesh,

    Thank you for the reply.

    Now I can get the data from CAN port. The reason of this problem is basic, resistance problem.

    But, I have another problem. After I convert .out file to ASCII Hex format , It consists of the sections shown below.

     -Section#-  -Start Address-  -Block Size-  -End Address-  -Write Status-
    1 - 00311c48 - 0c23 - 0031286b - False
    2 - 00312cdd - 0004 - 00312ce1 - False
    3 - 00301d34 - e8d5 - 00310609 - False
    4 - 00310609 - 163f - 00311c48 - False
    5 - 0031288a - 0174 - 003129fe - False
    6 - 00312c52 - 0055 - 00312ca7 - False
    7 - 00312b33 - 011c - 00312c4f - False
    8 - 003129fe - 0135 - 00312b33 - False
    9 - 00300000 - 0100 - 00300100 - False
    10 - 0000e9a0 - 0004 - 0000e9a4 - False
    11 - 0000e30c - 0100 - 0000e40c - False
    12 - 00312c4f - 0003 - 00312c52 - False
    13 - 0033fff6 - 0002 - 0033fff8 - False
    14 - 00312ca7 - 0036 - 00312cdd - False
    15 - 0031286b - 001f - 0031288a - False
    16 - 00300100 - 1c34 - 00301d34 - False

    ASCII hex file has the sections whose start adress belong to RAM. ,Because of this, FlashProgram function of FLASH API gives error when I try to copy data from RAM inti FLASH.  

    My question is that is it normal to be found these kind of memory sections  in ASCII HEX file ??

    Also, What is the best frequency to send two bytes CAN data on the bus ?

    Best Regards

    Sertac 

  • You need to examine your Linker command file and ensure all sections that you would like to locate in Flash are configured so.
  • Thank You..

    We do not write sections whose start adress belong to RAM and  we can now load our application code into F28335's flash through CAN bus.  

    I will try to solve the problem RAM sections in the .out file. If I could not succeed I will ask about this issue under related post. 

    Best Regards

  • Any section(s) that need to eventually run out of RAM can be copied to RAM at run-time. i.e. could be part of flash along with other sections , but copied to RAM as and when needed.

  • Hareesh,

    We have two cmd files in our project, F28335_BIOS_flash.cmd and F28335_BIOS_ram.cmd .

    Their content is shown below:

    F28335_BIOS_flash.cmd :

    SECTIONS

    {

    /*** User Defined Sections ***/

      codestart         : > BEGIN_FLASH,           PAGE = 0           /* Used by file CodeStartBranch.asm */

      csm_rsvd          : > CSM_RSVD,              PAGE = 0           /* Used by file passwords.asm */

      internalMemFuncs  : > FLASH,        PAGE = 0           /* Used by file Xintf.c.  Link to internal memory */

      passwords         : > PASSWORDS,             PAGE = 0           /* Used by file Passwords.asm */

      secureRamFuncs    :   LOAD = FLASH, PAGE = 0           /* Used by file Flash.c */

                            RUN = SARAMALL,       PAGE = 0           /* Load to flash, run from CSM secure RAM */

                            LOAD_START(_secureRamFuncs_loadstart),

                            LOAD_SIZE(_secureRamFuncs_loadsize),

                            RUN_START(_secureRamFuncs_runstart)

    /* SRAM_buffers   : > SRAM_DATA,         PAGE = 1 */

    SRAM_funcs       :   LOAD = FLASH,

    /*                         RUN = SRAM_PROGRAM, */

    RUN = SARAMALL,

                            LOAD_START(_SramFuncsLoadStart),

                            LOAD_SIZE(_SramFuncsLoadSize),

                            RUN_START(_SramFuncsRunStart),

                            PAGE = 0

    }

    F28335_BIOS_ram.cmd :

    SECTIONS
    {
    /*** User Defined Sections ***/
    codestart : > BEGIN_M0, PAGE = 0 /* Used by file CodeStartBranch.asm */
    internalMemFuncs : > SARAMALL, PAGE = 0 /* Used by file Xintf.c. Link to internal memory */
    SRAM_buffers : > SRAM_DATA, PAGE = 1
    SRAM_funcs : > SRAM_PROGRAM, PAGE = 0
    }

    Do you think that this kind of configuration cause an errror mentioned above ?

    Regards

    Sertac