CCS/TMS320F28379D: I get some problems when I load my code in FLASH

Diego Bellachioma

Part Number: TMS320F28379D
Other Parts Discussed in Thread: CCSTUDIO

Tool/software: Code Composer Studio

Hi there.

I just solved some issues with a simple code where I use CPU1 and CLA1 loaded in RAM with 2837xD_RAM_CLA_lnk_cpu1.cmd file with some changes. The main changes are:

...

RAMGS0 -> PAGE =1 in PAGE = 0
...
.text : >> RAMD0|RAMD1|RAMGS0, PAGE = 0
...
Cla1Prog : > RAMLS4_LS5, PAGE=0
...

and then

MemCfgRegs.LSxMSEL.bit.MSEL_LS4 = 1;
MemCfgRegs.LSxMSEL.bit.MSEL_LS5 = 1;
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS4 = 1;
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS5 = 1;

in the CPU1 code to assign the right CLA RAM's ownership.

Now I got functional problem whe I load it in FLASH! I obtain ILLEGAL_ISR() halt. I looked some thread and I realized that the problem is on InitFlash() and DELAY_US() function: they must loaded from FLASH to RAM.

I belived, when I used 2837xD_FLASH_CLA_lnk_cpu1.cmd linker file, it was enough if I set _FLASH parameter in Command File Preprocessing Linker option. Moreover, above InitFlash() there is this code section:

#ifdef __cplusplus ??? I created C source files
#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000 ??? I use cgt 6.4.2 so is ramfuncs section OK ?
#pragma CODE_SECTION(".TI.ramfunc");
#else
#pragma CODE_SECTION("ramfuncs");
#endif
#endif
#endif

I use CCStudio 7 with __TI_COMPILER_VERSION__ symbol value at 6004002 (cgt 6.4.2 -> With TI v16.9.1.LTS I got a lot of compilation problems). So, there is someone that explan me how I can load my code in FLASH to avoid ILLEGAL_ISR(). I wish to understand how I can found the origin of this error while sniffing assembler code and CPU registers.

Thanks a lot for your help.

Diego.

over 8 years ago

0 Vamsi Gudivada over 8 years ago

TI__Guru* 87145 points

Diego,

Regarding the illegal_ISR(): You need to use memcpy() in your application to copy the contents of the ramfuncs section from Flash to RAM before your application can execute those functions from RAM. If not, CPU will fetch garbage from the RAM and end up in illegal_ISR().

For e.g., below copied code snippet from void InitSysCtrl(void) function in F2837xS_SysCtrl.c uses memcpy() function. Did you use this function?

#ifdef _FLASH

//
// Copy time critical code and Flash setup code to RAM. This includes the
// following functions: InitFlash()
//
// The RamfuncsLoadStart, RamfuncsLoadSize, and RamfuncsRunStart
// symbols are created by the linker. Refer to the device .cmd file.
//
memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);

//
// Call Flash Initialization to setup flash waitstates. This function must
// reside in RAM.
//
InitFlash_Bank0();
#endif

In debugger, you can step in to your ramfuncs related function to notice the control going to RAM in the disassembly window (since you assigned a Flash load address and a RAM run address in your linker command file). If the RAM contents are not valid, a fetch from those locations will take you to ILLEGAL_ISR().

Regarding the compilation errors with TI v16.9.1.LTS: Did you try to resolve them? Let us know if you need any help.

Thanks and regards,
Vamsi

0 Diego Bellachioma over 8 years ago in reply to Vamsi Gudivada

Intellectual 500 points

Hi Vamsi.

Thanks a lot for your replay.

I understood the argument but I have some fog in my mind yet. I hope in your clarification.

In my main the first TI function that I call is InitSysCtrl():

void main(void)
{
   int i = 0;
//
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the F2837xD_SysCtrl.c file.
//
    InitSysCtrl();  // DB - System Control Register Initialization

In this function the code is that:

void InitSysCtrl(void)
{
    //
    // Disable the watchdog
    //
    DisableDog();

#ifdef _FLASH   // DB - Parameter passed by PRJ C2000 Compiler Options
    //
    // Copy time critical code and Flash setup code to RAM. This includes the
    // following functions: InitFlash()
    //
    // The  RamfuncsLoadStart, RamfuncsLoadSize, and RamfuncsRunStart
    // symbols are created by the linker. Refer to the device .cmd file.
    //
    memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);

    //
    // Call Flash Initialization to setup flash waitstates. This function must
    // reside in RAM.
    //
    InitFlash();
#endif

so, with _FLASH declared in linker parameters options the function memcpy should be able to copy InitFlash code from FLASH to RAM. If I take look at InitFlash file declaration I see that:

#ifdef __cplusplus
    #ifdef __TI_COMPILER_VERSION__
        #if __TI_COMPILER_VERSION__ >= 15009000
            #pragma CODE_SECTION(".TI.ramfunc");
        #else
            #pragma CODE_SECTION("ramfuncs");
        #endif
    #endif
#endif

void InitFlash(void)
{
    EALLOW;

    //
    // Set VREADST to the proper value for the flash banks to power up
    // properly. This sets the bank power up delay.
    //
    Flash0CtrlRegs.FBAC.bit.VREADST = 0x14;

Unfortunately, I see the all pragma directive in grey status because __cplusplus is not declared. Why had TI make this choice ? Shouldn't it appear #pragma CODE_SECTION(InitFlash,"ramfuncs"); first the function definition also for c source files ?

Moreover, I need, like I just did for RAM program version, assign LS4_LS5 to Cla1Prog so I modified 2837xD_FLASH_CLA_lnk_cpu1.cmd in this way:

// The user must define CLA_C in the project linker settings if using the
// CLA C compiler
// Project Properties -> C2000 Linker -> Advanced Options -> Command File
// Preprocessing -> --define
#ifdef CLA_C
// Define a size for the CLA scratchpad area that will be used
// by the CLA compiler for local symbols and temps
// Also force references to the special symbols that mark the
// scratchpad are.
CLA_SCRATCHPAD_SIZE = 0x100;
--undef_sym=__cla_scratchpad_end
--undef_sym=__cla_scratchpad_start
#endif //CLA_C

MEMORY
{
   PAGE 0 :
   /* BEGIN is used for the "boot to SARAM" bootloader mode   */

   BEGIN           	: origin = 0x080000, length = 0x000002
   RAMM0           	: origin = 0x000122, length = 0x0002DE
   RAMD0           	: origin = 0x00B000, length = 0x000800
   RAMGS0           : origin = 0x00C000, length = 0x001000
   RAMGS1           : origin = 0x00D000, length = 0x001000
// RAMLS4      	    : origin = 0x00A000, length = 0x000800
// RAMLS5           : origin = 0x00A800, length = 0x000800
   RAMLS4_LS5     	: origin = 0x00A000, length = 0x001000
   RAMGS14          : origin = 0x01A000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
   RAMGS15          : origin = 0x01B000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
   RESET           	: origin = 0x3FFFC0, length = 0x000002

   /* Flash sectors */
   FLASHA           : origin = 0x080002, length = 0x001FFE	/* on-chip Flash */
   FLASHB           : origin = 0x082000, length = 0x002000	/* on-chip Flash */
   FLASHC           : origin = 0x084000, length = 0x002000	/* on-chip Flash */
   FLASHD           : origin = 0x086000, length = 0x002000	/* on-chip Flash */
   FLASHE           : origin = 0x088000, length = 0x008000	/* on-chip Flash */
   FLASHF           : origin = 0x090000, length = 0x008000	/* on-chip Flash */
   FLASHG           : origin = 0x098000, length = 0x008000	/* on-chip Flash */
   FLASHH           : origin = 0x0A0000, length = 0x008000	/* on-chip Flash */
   FLASHI           : origin = 0x0A8000, length = 0x008000	/* on-chip Flash */
   FLASHJ           : origin = 0x0B0000, length = 0x008000	/* on-chip Flash */
   FLASHK           : origin = 0x0B8000, length = 0x002000	/* on-chip Flash */
   FLASHL           : origin = 0x0BA000, length = 0x002000	/* on-chip Flash */
   FLASHM           : origin = 0x0BC000, length = 0x002000	/* on-chip Flash */
   FLASHN           : origin = 0x0BE000, length = 0x002000	/* on-chip Flash */

PAGE 1 :

   BOOT_RSVD        : origin = 0x000002, length = 0x000120     /* Part of M0, BOOT rom will use this for stack */
   RAMM1            : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */

   RAMLS0          	: origin = 0x008000, length = 0x000800
   RAMLS1          	: origin = 0x008800, length = 0x000800
   RAMLS2      		: origin = 0x009000, length = 0x000800
   RAMLS3      		: origin = 0x009800, length = 0x000800

// RAMGS0           : origin = 0x00C000, length = 0x001000
// RAMGS1           : origin = 0x00D000, length = 0x001000
   RAMGS2           : origin = 0x00E000, length = 0x001000
   RAMGS3           : origin = 0x00F000, length = 0x001000
   RAMGS4           : origin = 0x010000, length = 0x001000
   RAMGS5           : origin = 0x011000, length = 0x001000
   RAMGS6           : origin = 0x012000, length = 0x001000
   RAMGS7           : origin = 0x013000, length = 0x001000
   RAMGS8           : origin = 0x014000, length = 0x001000
   RAMGS9           : origin = 0x015000, length = 0x001000
   RAMGS10          : origin = 0x016000, length = 0x001000
   RAMGS11          : origin = 0x017000, length = 0x001000
   RAMGS12          : origin = 0x018000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
   RAMGS13          : origin = 0x019000, length = 0x001000     /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */

   CLA1_MSGRAMLOW   : origin = 0x001480, length = 0x000080
   CLA1_MSGRAMHIGH  : origin = 0x001500, length = 0x000080
}


SECTIONS
{
   /* Allocate program areas: */
   .cinit           : > FLASHB      PAGE = 0, ALIGN(4)
   .pinit           : > FLASHB,     PAGE = 0, ALIGN(4)
   .text            : > FLASHB      PAGE = 0, ALIGN(4)
   codestart        : > BEGIN       PAGE = 0, ALIGN(4)

   /* Allocate uninitalized data sections: */
   .stack           : > RAMM1        PAGE = 1
   .ebss            : > RAMLS2       PAGE = 1
   .esysmem         : > RAMLS2       PAGE = 1

   /* Initalized sections go in Flash */
   .econst          : > FLASHB      PAGE = 0, ALIGN(4)
   .switch          : > FLASHB      PAGE = 0, ALIGN(4)

   .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */

// Filter_RegsFile  : > RAMGS0,	   PAGE = 1
   Filter_RegsFile  : > RAMGS2,	   PAGE = 1

    /* CLA specific sections */
   Cla1Prog         : LOAD = FLASHD,
                      RUN = RAMLS4_LS5,
                      LOAD_START(_Cla1funcsLoadStart),
                      LOAD_END(_Cla1funcsLoadEnd),
                      RUN_START(_Cla1funcsRunStart),
                      LOAD_SIZE(_Cla1funcsLoadSize),
                      PAGE = 0, ALIGN(4)

   CLADataLS0		: > RAMLS0, PAGE=1
   CLADataLS1		: > RAMLS1, PAGE=1

   Cla1ToCpuMsgRAM  : > CLA1_MSGRAMLOW,   PAGE = 1
   CpuToCla1MsgRAM  : > CLA1_MSGRAMHIGH,  PAGE = 1

#ifdef __TI_COMPILER_VERSION__
   #if __TI_COMPILER_VERSION__ >= 15009000
    .TI.ramfunc : {} LOAD = FLASHD,
//					 RUN = RAMLS4_LS5,
					 RUN = RAMGS1,
                     LOAD_START(_RamfuncsLoadStart),
                     LOAD_SIZE(_RamfuncsLoadSize),
                     LOAD_END(_RamfuncsLoadEnd),
                     RUN_START(_RamfuncsRunStart),
                     RUN_SIZE(_RamfuncsRunSize),
                     RUN_END(_RamfuncsRunEnd),
					 PAGE = 0, ALIGN(4)
   #else
   ramfuncs :		 LOAD = FLASHD,
//                   RUN = RAMLS4_LS5,
					 RUN = RAMGS1,
                     LOAD_START(_RamfuncsLoadStart),
                     LOAD_SIZE(_RamfuncsLoadSize),
                     LOAD_END(_RamfuncsLoadEnd),
                     RUN_START(_RamfuncsRunStart),
                     RUN_SIZE(_RamfuncsRunSize),
                     RUN_END(_RamfuncsRunEnd),
                     PAGE = 0, ALIGN(4)
   #endif
#endif

   /* The following section definition are for SDFM examples */
/*
   Filter1_RegsFile : > RAMGS1,	PAGE = 1, fill=0x1111
   Filter2_RegsFile : > RAMGS2,	PAGE = 1, fill=0x2222
   Filter3_RegsFile : > RAMGS3,	PAGE = 1, fill=0x3333
   Filter4_RegsFile : > RAMGS4,	PAGE = 1, fill=0x4444
*/
   Filter1_RegsFile : > RAMGS3,	PAGE = 1, fill=0x1111
   Filter2_RegsFile : > RAMGS4,	PAGE = 1, fill=0x2222
   Filter3_RegsFile : > RAMGS5,	PAGE = 1, fill=0x3333
   Filter4_RegsFile : > RAMGS6,	PAGE = 1, fill=0x4444

#ifdef CLA_C
   /* CLA C compiler sections */
   //
   // Must be allocated to memory the CLA has write access to
   //
   CLAscratch       :
                     { *.obj(CLAscratch)
                     . += CLA_SCRATCHPAD_SIZE;
                     *.obj(CLAscratch_end) } >  RAMLS1,  PAGE = 1

   .scratchpad      : > RAMLS1,       PAGE = 1
   .bss_cla		    : > RAMLS1,       PAGE = 1
   .const_cla	    :  LOAD = FLASHB,
                       RUN = RAMLS1,
                       RUN_START(_Cla1ConstRunStart),
                       LOAD_START(_Cla1ConstLoadStart),
                       LOAD_SIZE(_Cla1ConstLoadSize),
                       PAGE = 1
#endif //CLA_C
}

Do you check if is it correct ? I end up again in Illegal_ISR().

Thanks and regards,

Diego.

0 Vamsi Gudivada over 8 years ago in reply to Diego Bellachioma

TI__Guru* 87145 points

Diego,

1) Regarding the _FLASH symbol: Can you confirm whether _FLASH symbol is defined in your project's compiler build settings or not? You can navigate like this: Right click on the project -> Show Build Settings -> Build -> C2000 Compiler -> Advanced Options -> Predefined Symbols -> Pre-define Name (here you should have _FLASH defined).

2) Regarding the #pragma: For C++, the pragma directives should be mentioned right above the function definition. You are referring to those directives. For C, TI declared the pragma directives at the top of the F2837xD_SysCtrl.c file. See below snippet copied from this file. This is what you need in your case.

#ifndef __cplusplus
#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
#pragma CODE_SECTION(InitFlash, ".TI.ramfunc");
#pragma CODE_SECTION(FlashOff, ".TI.ramfunc");
#else
#pragma CODE_SECTION(InitFlash, "ramfuncs");
#pragma CODE_SECTION(FlashOff, "ramfuncs");
#endif
#endif
#endif

3) Regarding the linker command file changes: I don't see any glaring issue but I can ask our CLA expert to take a look just in case.

4) Did you figure out the function that is causing the ILLEGAL_ISR() by stepping through the code?

Thanks and regards,
Vamsi

0 Diego Bellachioma over 8 years ago in reply to Vamsi Gudivada

Intellectual 500 points

Hi Vamsi,

I'm totally agree with you because I found a little workaround that allowed me to load my CPU1/CLA1 code on FLASH. Anyway, speaking of, I must change one directive in F2837xD_usDelay.asm like below:

;//###########################################################################
;// $TI Release: F2837xD Support Library v210 $
;// $Release Date: Tue Nov  1 14:46:15 CDT 2016 $
;// $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
;//             http://www.ti.com/ ALL RIGHTS RESERVED $
;//###########################################################################

       .def _F28x_usDelay
;      .sect ".TI.ramfunc"	;; DB @ ORIG
	   .sect "ramfuncs"		;; DB @ ADDED

        .global  __F28x_usDelay
_F28x_usDelay:
        SUB    ACC,#1
        BF     _F28x_usDelay,GEQ    ;; Loop if ACC >= 0
        LRETR

Do you tell me why ? Unfortunatelly, my cgt is 6.4.2, so ...

Thanks a lot for your attention.

Best regards.

Diego

0 Christopher Chiarella over 8 years ago in reply to Diego Bellachioma

TI__Mastermind 30255 points

Diego,

Your workaround is correct. With the newer compilers (15.9.0 and newer), we transitioned to using the ".TI.ramfunc" section for RAM functions.
Most files have compiler version checks, but I can confirm the F2837xD_usDelay.asm is the only one that doesn't since the compiler version macro isn't available to the assembler. If you do switch to a newer compiler, make sure to switch it back to ".TI.ramfunc".

We'll work to document this better.

Best Regards
Chris

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CCS/TMS320F28379D: I get some problems when I load my code in FLASH