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TMS320F28034: F28034 ADC SOC question

Jack Tan80
Mastermind 7150 points
Part Number: TMS320F28034


Hi C2000 expert,

I'm using F28034 revision A Silicon, Picolo errata list user should discard the first sample at the beginning of every series of conversions.

I have a question here, due to some of the signal I have to sampled at special location in each pwm, my configuration is shown as below:

EPWM1 SOCA is used to trigger SOC0, SOC1, SOC3, SOC4,
EPWM2 SOCA is used to trigger SOC5, SOC6, SOC8
EPWM3 SOCB is used to trigger SOC7, SOC9, SOC10

My question is that, is it necessary to ignore the result0, result5, and result7? Or we just have to ignore SOC0 value. 

Regards,

Jack

  • 0
    TI__Guru 62975 points

    Jack,

    A series of conversions would be any group of SOCs that are processed without any ADC idle time.  So in the case of EPWM1-SOCA, you are triggering SOC0/1/3/4 together and they will be processed by the ADC without any idle time in-between.  In this instance, you only need to discard SOC0.

    If EPWM2-SOCA is triggered before or during SOC4 ACQPS sampling, then SOC5/6/8 will be processed without any ADC idle time so you will not need to discard SOC5.

    However, if EPWM2-SOCA is triggered after SOC4 is done ACQPS sampling, then the ADC will have idle cycles and you will need to discard the first sample.

    -Tommy

  • 0 in reply to tlee
    Mastermind 7150 points
    Tommy,

    Thanks for your answer. Is it possible to add this info to errata? I think it will help user to understand the workaround solution clearly.

    Regards,
    Jack
  • 0 in reply to Jack Tan80
    TI__Guru 62975 points
    Jack,

    I'll submit a request for this. Thanks for the suggestion.

    -Tommy
  • 0 in reply to tlee
    Mastermind 7150 points

    Hi Tommy,

    Below code is copied from interleaved PFC sample project. In order to get average current in one cycle, the 8x oversampling was used, thus 7 different SOC trigger sources are used to sample current at spacial location in each PWM cycle.

    From your comment in above post, if ADC will have idle cycles , then the first sample should be discarded. In this sample project, how to make sure there is no ADC idle cycle while using different SOC trigger sources?

    //Oversampling of current, 8x OVS,

    //New ILPFC board

    ChSel[0] = ADC_PIN_IL_AVG; // Dummy read for first

    ChSel[1] = ADC_PIN_IL_AVG; // A4 - IpfcA

    ChSel[2] = ADC_PIN_IL_AVG; // A4 - IpfcA

    ChSel[3] = ADC_PIN_IL_AVG; // A4 - IpfcA

    ChSel[4] = ADC_PIN_IL_AVG; // A4 - IpfcA

    ChSel[5] = ADC_PIN_IL_AVG; // A4 - IpfcA

    ChSel[6] = ADC_PIN_IL_AVG; // A4 - IpfcA

    ChSel[7] = ADC_PIN_IL_AVG; // A4 - IpfcA

    ChSel[8] = ADC_PIN_IL_AVG; // A4 - IpfcA

    ChSel[9] = ADC_PIN_VOUT; // A2 - Vbus

    ChSel[10] = ADC_PIN_VIN_L; // B2 - VL_fb

    ChSel[11] = ADC_PIN_VIN_N; // B0 - VN_fb

    // ADC Trigger Selection, New ILPFC board

    TrigSel[0] = ADCTRIG_EPWM3_SOCA; // ePWM3, ADCSOCA

    TrigSel[1] = ADCTRIG_EPWM3_SOCA; // ePWM3, ADCSOCA

    TrigSel[2] = ADCTRIG_EPWM4_SOCA; // ePWM4, ADCSOCA

    TrigSel[3] = ADCTRIG_EPWM3_SOCB; // ePWM3, ADCSOCB

    TrigSel[4] = ADCTRIG_EPWM4_SOCB; // ePWM4, ADCSOCB

    TrigSel[5] = ADCTRIG_EPWM1_SOCA; // ePWM1, ADCSOCA

    TrigSel[6] = ADCTRIG_EPWM2_SOCA; // ePWM2, ADCSOCA

    TrigSel[7] = ADCTRIG_EPWM1_SOCB; // ePWM1, ADCSOCB

    TrigSel[8] = ADCTRIG_EPWM2_SOCB; // ePWM2, ADCSOCB

    TrigSel[9] = ADCTRIG_EPWM1_SOCA; // ePWM1, ADCSOCA

    TrigSel[10] = ADCTRIG_EPWM1_SOCA; // ePWM1, ADCSOCA

    TrigSel[11] = ADCTRIG_EPWM1_SOCA; // ePWM1, ADCSOCA

    Regards,

    Jack

  • 0 in reply to Jack Tan80
    Mastermind 7150 points
    Tommy/C2000 expert,

    Is there any update about the ADC soc configuration of PFC example code?

    Regards,
    Jack
  • 0 in reply to Jack Tan80
    TI__Guru 62975 points

    Jack,

    Sorry for the delayed response.  I was out of the office.

    For spurious triggering, there isn't a good way to keep the ADC active when conversions are not needed.

    You have the option of triggering two conversions each time with the SOC generated early to account for the throwaway conversions; or you can clock the ADC with <=30MHz and use the non-overlap conversion mode.

    -Tommy

  • 0 in reply to tlee
    Mastermind 7150 points

    Hi Tommy,

    Thanks for your reply. 

    It seems that ILPFC example code has a risk in using ADC oversampling. 

    Regards,

    Jack