This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CCS/TMS320F28335: HRPWM looks exactly like EPWM

Part Number: TMS320F28335
Other Parts Discussed in Thread: CONTROLSUITE

Tool/software: Code Composer Studio

Hello,

Having been able to get HRPWM to work, I am a little bothered as the result I got is not as good as I had expected. The HR Configuration is as follows:

EPwm4Regs.CMPA.half.CMPAHR = (1 << 8);       // initialize HRPWM extension
EALLOW; EPwm4Regs.HRCNFG.all = 0x0; EPwm4Regs.HRCNFG.bit.EDGMODE = 2; // MEP control on falling edge EPwm4Regs.HRCNFG.bit.CTLMODE = 0; //CMPAHR control EPwm4Regs.HRCNFG.bit.HRLOAD = 0; //load on ctr = 0 EDIS;

I embedded the coded in my normal epwm code. And I am updating the CMPA and CMPAHR registers with Adc output through epwm ISR. I converted the Adc output before the CMPA and CMPAHR update by following the steps listed in http://www.ti.com/lit/ug/spru924f/spru924f.pdf. My Tsysclkout is 6.667ns and my MEP is calculated as 44. Below is what I got:

1. With HRPWM

2. NO HRPWM

I really can't tell the difference. Maybe I am doing something wrong.

I'd appreciate advice and pointers.

+ don't mind the frequency displayed (I believe it is as a result of expanding the image, so to speak), the true frequency is 330kHz.

Thanks.

David.

  • Hello,
    I am writing to let you know that a C2000 team member has been assigned to this post and should be answering shortly.

    Regards
    Baskaran
  • Hi David,

    The EALLOW is commented out in the code you shared. Is that how the code is in your application?

    You linked to the HRPWM User's Guide for a different device. While there may not be changes, the F2833x HRPWM User's Guide is found here: www.ti.com/lit/ug/sprug02b/sprug02b.pdf

    I generally recommend referring to the user's guides for the specific device you're working with in case the peripheral has changed.

    Regards,
    Elizabeth
  • David,

    In addition what Elizabeth suggested, can you zoom in on the falling edge? It looks like there is something bad going on there (why is the waveform so thick)?

    Generally the way I test for HR movement is to setup another PWM identically and in sync without HRPWM enabled. Put these both on the scope at the same time and play with the CMPAHR/CMPBHR values on the PWM with HR enabled to see the movement.

    Regards,

    Kris

  • Thanks for the reference.
    I have check it out. There isn't much difference. Also, EALLOW is not commented out in the code. I must have missed that when pasting it.
    David.
  • David,

    What are you setting the CMPAHR / CMPBHR values to? I see the line where you enable it, but beyond that a value needs to be programmed into it to determine how many MEP to apply to the output.

    Have you ran any of our reference projects in controlSUITE?

    Regards,
    Kris
  • Thanks.

    I have zoomed the falling edge, find below. It truly looks weird. I will also place the two side by side for better comparison. But in the mean time, what do you think about this?

  • yeah.
    I am setting the CMPAHR and CMPA based on the output of adc conversion. Where dutycalc is the output of the adc conversion between 0 and 1. The method is as follows:

    __interrupt void  epwm_isr(void)
    {
      fract = modf(dutycalc*EPwm4Regs.TBPRD,&intduty);				//extract integer and fractional part
      EPwm4Regs.CMPA.half.CMPAHR = (fract*MEP_ScaleFactor+1.5)*256; //mutiply mep and add 1.5 to keep it btw 1 and 255. Multiply with 256 is same as <<8 //1st 8bits are unused
      EPwm4Regs.CMPA.half.CMPA = intduty;							//integer part of new duty cycle
      //EPwm4Regs.CMPA.half.CMPA = dutycalc*EPwm4Regs.TBPRD;
      EPwm4Regs.ETCLR.bit.INT = 1;       // Clear INT SEQ1 bit
      PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;   // Acknowledge interrupt to PIE
      return;
    }

    Also, I successfully ran the Example_2833xHRPWM. I learnt from it but it wasn't completely applicable to my case. I feel if I get good result with this then I can move on to Scale Factor Optimization........

    David

  • David,

    I think we need to figure out the falling edge issue before we're going to be able to see any benefits from the HRPWM. Are you using a TI board for development or a custom board? Are your PWMs currently driving a load of any kind, and if so, are you able to disconnect them and retry the waveform capture? Also, please post the full PWM initialization routine you are using.

    Your last post with the CMPAHR and CMPBHR update code doesn't seemed to have come through.

    Regards,
    Kris
  • I agree with you. The falling edge is messed up.
    I am not driving anything at all. I am just plotting the pwm output on a scope. The hrpwm initialization is as follows:

    void Setup_HRPWM4A(void)
    {
    	EPwm4Regs.TBCTL.bit.CLKDIV = 0;			//SysClkOut/1 ie default
    	EPwm4Regs.TBCTL.bit.HSPCLKDIV = 0;		//SysClkOut/1 but /2 is default //TBCLK = SysClkOut = 150MHz
    	EPwm4Regs.TBCTL.bit.CTRMODE = 0;		//UP COUNT
    	EPwm4Regs.TBCTL.bit.PRDLD = 0;			//TBPRD period shadow, load on ctr = 0
    	EPwm4Regs.TBCTL.bit.SYNCOSEL = 3;		//disable sync output select
    	EPwm4Regs.TBPRD = 4989/11;				//330kHz
    	EPwm4Regs.CMPA.half.CMPA = 0;			//initial CMPA = 0
    
    	EPwm4Regs.CMPA.half.CMPAHR = (1 << 8);       // initialize HRPWM extension
    	EPwm4Regs.CMPCTL.bit.LOADAMODE = 0;
    	EPwm4Regs.CMPCTL.bit.SHDWAMODE = 0;
    
    	EPwm4Regs.AQCTLA.all = 0x0012;			//ctr = 0 (set), ctr = cmpa on up count (clear)
    	EPwm4Regs.ETSEL.bit.SOCAEN = 1;        // Enable SOC on A group
    	EPwm4Regs.ETSEL.bit.SOCASEL = 1;       // Select SOC from CTR=0
    	EPwm4Regs.ETPS.bit.SOCAPRD = 1;        // Generate pulse on 1st event
    	EPwm4Regs.ETSEL.bit.INTEN = 1;        // enable pwm interrupt
    	EPwm4Regs.ETSEL.bit.INTSEL = 2;        // enable interrupt on ctr = PRD
    	EPwm4Regs.ETPS.bit.INTPRD = 1;        // interrupt on 1st event
    
    	EALLOW;
    	EPwm4Regs.HRCNFG.all = 0x0;
    	EPwm4Regs.HRCNFG.bit.EDGMODE = 2;		 // MEP control on falling edge
    	EPwm4Regs.HRCNFG.bit.CTLMODE = 0;		//CMPAHR control
    	EPwm4Regs.HRCNFG.bit.HRLOAD  = 0;		//load on ctr = 0
    	EDIS;
    }

  • One issue which jumps out is that you are using CTR=0 to set the PWM. When HRPWM is enabled, you have a 3 cycle restriction from CTR=0 and CTR=PRD that you are restricted from action qualifier events. I don't think that's the full story though since it also looks like it occurs when you don't have HRPWM enabled from the waveform in your first post. When you said HRPWM is disabled, does that mean that lines 23-28 were commented out?

    Regards,
    Kris
  • sorry about that, I usually have to re-edit a previous reply before I can put images and other things. The codes are there now.
    David.
  • Yes. Line 23-28 as well as 11 are commented out when I am not using HRPWM. I learnt of the 3cycle restriction (or delay before hrpwm kicks in), but I wasn't too bothered because I think I only need it for the Falling Edge. This is because I am using up-count.

    Do you think that can be an issue?

    David.

  • Hello Kris,

    I have placed the two pwms together. Yellow - No hrpwm. Blue - with hrpwm



    There is really no difference. What do you think?

    Thanks.

    David.

  • Hello,

    This is a gentle reminder about my query.

    Thanks.

    David.

  • Hi David,

    Even though you are not using the HRPWM near the TBCTR = 0 you will still need to avoid this range when HRPWM is enabled. I do not think this is the issue with the falling edge though.

    To debug, can you comment out everything but the very basics of the PWM? I would leave just to the Time base and Action Qualifier Configurations (no HRPWM). Let's make sure we can get that falling edge cleaned up first. If that works, start adding the other sections back in to see if we can isolate where the issue is.

    Regards,
    Kris
  • Thanks for your response.

    I have tried debugging the pwms. I tried lower frequencies and I got good results. I think the falling edge blur may be because of the frequency I am working with and the fact that the adc output is never constant even at constant analogue input.

    Ordinarily, this is what I am getting:

    I only start seeing the blur whenever I zoom the falling edge. Is there a way to keep the output of the ADC constant as it seems its fluctuation is responsible for the blur?

    Or what other thing can I try?

    By the way, since I am working with duty cycles, the material suggested by Elizabeth advised working on CMPAHR and not TBPHSHR so I am not sure how I can avoid using CTR = 0. If I try using up-down, them I'd likely have to worry about both edges leading to TBPHSHR.

    Hope to hear from you soon.

    Kind regards.

    David.

  • Hello,
    This is a gentle reminder about my query.
    Thanks.
    David.
  • David,

    That doesn't look like a variable frequency ADC issue to me unless your scope just isn't updating in time. If it were just different timing I don't think we'd see the signal bouncing. I could certainly be wrong but my hunch is there's more to the story. Let me contact one of the ADC experts to see if they can help us here. I'd like to get that straightened out before trying to work with the HRPWM.

    Regards,
    Kris
  • Thanks Kris.

    Hope to hear from you soon.

    David.