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TMS320F28377D: difference access speed between CPU1 & CPU2 flash

Part Number: TMS320F28377D
Other Parts Discussed in Thread: CONTROLSUITE

Hi,

Trying C:\ti\controlSUITE\device_support\F2837xD\v210\F2837xD_examples_Dual\ipc_gpio_toggle example,
when I use attach files (ipc_gpio_toggle_cpu01_bsp001.c & ipc_gpio_toggle_cpu02_bsp001.c) and run in RAM,
both toggle signals of CPU1 & CPU2 are synchronizing.
But CPU2 toggle signal was faster than CPU1 when run in flash.

Any explanation for the difference access speed between CPU1 & CPU2 flash?
thanks,

best regards,
Simen
-----------------------------------------------------------------------

CPU2 toggle timing in flash

CPU1 toggle timing in flash

ipc_gpio_toggle_cpu01_bsp001.c
//###########################################################################
//
// FILE:   ipc_gpio_toggle_cpu01.c
//
// TITLE:  GPIO Toggle for F2837xD CPU1.
//
//! \addtogroup dual_example_list
//! <h1> IPC GPIO toggle </h1>
//!
//! This example shows GPIO input on the local CPU triggering an output on the
//! remote CPU. A GPIO input change on CPU01 causes an output change on CPU02
//! and vice versa. \n
//! CPU1 has control of GPIO31 , GPIO15 and GPIO14.\n
//! CPU2 has control of GPIO34 , GPIO12 and GPIO11.
//!
//! \b Hardware \b Connections
//!   - connect GPIO15 to GPIO11
//!   - connect GPIO14 to GPIO12
//!
//! \b Watch \b Pins
//!   - GPIO31 - output on CPU2 (LED blinking if using control card)
//!   - GPIO11 - input on CPU2
//!   - GPIO34 - output on CPU1 (LED blinking if using control card)
//!   - GPIO14 - input on CPU1
//!   - GPIO12 - square wave output on CPU02
//!   - GPIO15 - square wave output on CPU01
//
//###########################################################################
// $TI Release: F2837xD Support Library v210 $
// $Release Date: Tue Nov  1 14:46:15 CDT 2016 $
// $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
//             http://www.ti.com/ ALL RIGHTS RESERVED $
//###########################################################################

//
// Included Files
//
#include "F28x_Project.h"
#include "F2837xD_Ipc_drivers.h"

//
// Main
//
Uint32  Cnt=0;


void main(void)
{
//
// Declare all local variables
//
    uint16_t state;
    uint32_t count;

//
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the F2837xD_SysCtrl.c file.
//
    InitSysCtrl();

#ifdef _STANDALONE
#ifdef _FLASH
    //
    // Send boot command to allow the CPU2 application to begin execution
    //
    IPCBootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_FLASH);
#else
    //
    // Send boot command to allow the CPU2 application to begin execution
    //
    IPCBootCPU2(C1C2_BROM_BOOTMODE_BOOT_FROM_RAM);
#endif
#endif

//
// Step 2. Initialize GPIO:
//
    InitGpio();

//
// Give CPU2 Control of GPIO34 , GPIO12 and GPIO11
// GPIO34 and GPIO12 are output and GPIO11 is input
//
    GPIO_SetupPinMux(34,GPIO_MUX_CPU2,0);
    GPIO_SetupPinOptions(34, GPIO_OUTPUT,0);

    GPIO_SetupPinMux(12,GPIO_MUX_CPU2,0);
    GPIO_SetupPinOptions(12, GPIO_OUTPUT,0);

    GPIO_SetupPinMux(11,GPIO_MUX_CPU2,0);
    GPIO_SetupPinOptions(11, GPIO_INPUT,0);

//
// Give CPU1 Control of GPIO31 , GPIO15 and GPIO14
// GPIO31 and GPIO15 are output and GPIO14 is input
//
    GPIO_SetupPinMux(31,GPIO_MUX_CPU1,0);
    GPIO_SetupPinOptions(31, GPIO_OUTPUT,0);

    GPIO_SetupPinMux(15,GPIO_MUX_CPU1,0);
    GPIO_SetupPinOptions(15, GPIO_OUTPUT,0);

    GPIO_SetupPinMux(14,GPIO_MUX_CPU1,0);
    GPIO_SetupPinOptions(14, GPIO_INPUT,0);

//
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
//
    DINT;

//
// Initialize PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the F2837xD_PieCtrl.c file.
//
    InitPieCtrl();

//
// Disable CPU interrupts and clear all CPU interrupt flags:
//
    IER = 0x0000;
    IFR = 0x0000;

//
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example.  This is useful for debug purposes.
// The shell ISR routines are found in F2837xD_DefaultIsr.c.
// This function is found in F2837xD_PieVect.c.
//
    InitPieVectTable();

//
// Enable global Interrupts and higher priority real-time debug events:
//
    EINT;  // Enable Global interrupt INTM
    ERTM;  // Enable Global realtime interrupt DBGM

//
// Spin here until CPU02 is ready
//
    while(!IPCRtoLFlagBusy(IPC_FLAG17));
    IPCRtoLFlagAcknowledge(IPC_FLAG17);

    IPCLtoRFlagSet(IPC_FLAG11);


    while(1)
    {
            EALLOW;
            GpioDataRegs.GPATOGGLE.bit.GPIO31 = 1;
            EDIS;
            for(Cnt=0;Cnt<0x1000000;Cnt++);

    }
}

//
// End of file
//

ipc_gpio_toggle_cpu02_bsp001.c
//###########################################################################
//
// FILE:   ipc_gpio_toggle_cpu02.c
//
// TITLE:  IPC GPIO Toggle for F2837xD CPU2.
//
// This example tests the IPC of the F2837xD.
// CPU1 have controls of one input on GPIO15 and one output on GPIO11.
// CPU2 have controls of one input on GPIO14 and one output on GPIO12.
// Toggling the input on CPU1 will also toggle the output on CPU2 through IPC.
// Toggling the input on CPU2 will also toggle the output on CPU1 through IPC.
//
// \b Watch Variables \b
// - GPIO31 - output on CPU2
// - GPIO11 - input on CPU2
// - GPIO34 - output on CPU1
// - GPIO14 - input on CPU1
// - GPIO12 - square wave output on CPU02
// - GPIO15 - square wave output on CPU01
// Connect the outputs to an oscilloscope
//
//###########################################################################
// $TI Release: F2837xD Support Library v210 $
// $Release Date: Tue Nov  1 14:46:15 CDT 2016 $
// $Copyright: Copyright (C) 2013-2016 Texas Instruments Incorporated -
//             http://www.ti.com/ ALL RIGHTS RESERVED $
//###########################################################################

//
// Included Files
//
#include "F28x_Project.h"
#include "F2837xD_Ipc_drivers.h"

//
// Main
//
Uint32  Cnt=0;

void main(void)
{
//
// Declare all variables
//
    uint32_t count;
    uint16_t state;

//
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the F2837xD_SysCtrl.c file.
//
    InitSysCtrl();

//
// Step 2. Initialize GPIO:
//
// InitGpio();  // Skipped for this example

//
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
//
    DINT;

//
// Initialize PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the F2837xD_PieCtrl.c file.
//
    InitPieCtrl();

//
// Disable CPU interrupts and clear all CPU interrupt flags:
//
    IER = 0x0000;
    IFR = 0x0000;

//
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example.  This is useful for debug purposes.
// The shell ISR routines are found in F2837xD_DefaultIsr.c.
// This function is found in F2837xD_PieVect.c.
//
    InitPieVectTable();

//
// Enable global Interrupts and higher priority real-time debug events:
//
    EINT;   // Enable Global interrupt INTM
    ERTM;   // Enable Global realtime interrupt DBGM

    for(Cnt=0;Cnt<0x1000;Cnt++);


    IPCLtoRFlagSet(IPC_FLAG17);

    while(!IPCRtoLFlagBusy(IPC_FLAG11));
    IPCRtoLFlagAcknowledge(IPC_FLAG11);



    while(1)
    {
            EALLOW;
            GpioDataRegs.GPBTOGGLE.bit.GPIO34 = 1;
            EDIS;

            for(Cnt=0;Cnt<0x1000000;Cnt++);
    }
}

//
// End of file
//

  • Simen,

    Assuming that you use same waitstates on both CPUs and that there are no interrupts, the difference can be because of the code alignment in the memory - which can cause more or less fetches.

    Try putting your toggle code in a separate function and map it to the same address on both cores.

    Thanks and regards,
    Vamsi
  • Hi Vamsi,

    Your answer is right.
    They can synchronize when I map "loop function " to the same address on both cores.
    thanks,


    best regards,
    Simen
  • Simen,

    Glad that it worked. Flash fetches are 128-bit wide and the location of the code in this 128-bit aligned memory will cause differences in number of fetches when prefetch is enabled. When you map them to the same address, fetches will be similar. For better performance, always map your functions (if possible) at the start of a 128-bit aligned memory.

    I am closing this thread.

    Thanks and regards,
    Vamsi