TMDXIDDK377D: IDDK_PM_Servo_F2837x motor control isr timing

Part Number: TMDXIDDK377D

Hello,

I am currently using the IDDK_PM_Servo_F2837x as a reference project.

A am confused about the timing of the ISR and ADC SOC.

EPwm11Regs.CMPA.bit.CMPA = 640+320+500; // 640+320;

         // Setting up link from EPWM to ADC

         EPwm1Regs.ETSEL.bit.SOCASEL = ET_CTR_PRD; // Select SOC from counter at ctr = 0

         EPwm1Regs.ETPS.bit.SOCAPRD  = ET_1ST;     // Generate pulse on 1st even

         EPwm1Regs.ETSEL.bit.SOCAEN  = 1;          // Enable SOC on A group

         EPwm11Regs.ETSEL.bit.INTSEL = ET_CTRU_CMPA;   // INT on PRD event

         EPwm11Regs.ETSEL.bit.INTEN  = 1;              // Enable INT

         EPwm11Regs.ETPS.bit.INTPRD  = ET_1ST;         // Generate INT on every event

As i understand the ISR is triggered at TBCTR = 1460 and ADC SOC is triggered at TBCTR = 5000.

Since the SOC is triggered after the ISR it will be used in the next ISR and since the CMPA registers are updated at TBCTR = 0 the entire update delay between ADC sampling and pwm update will be 1.5 pwm period.

My question is am i missing something here or if not what is the reason for this delay?

Second question is what is the effect of loading the CMPA registers immediately (without shadow register)?

Thanks and Regards.