TCA9534: Implementation of I2C Driver

Needhu Gunasegaran

Part Number: TCA9534

Hello Team,

Could you please answer the question from my customer?
Please find the question below.

1: There is only one I2C source code of Ti, this one describes reading, writing an I2C EEPROM.
But I have the TI Port expander chip TCA9534 in use and I need for this a good code template, preferably without interrupt service routines.

2: The existing documentation is very narrow, in the "technical reference manual", there is not even common example as with other interfaces, for example sending / receiving are not included. So I need help on how I can realize an I2C-read with "repeated start" on different bus participants. This is the most elegant way to confirm the expander chip works.

3: My current implementation works only if disable the bus and reactivate it to read and write accesses to the TCA9534. This is possible with the help of the command "I2cRegs.I2CMDR.bit.IRS = 1/0". Is this allowed? Is there a better way?

4: Everything mentioned above should work in a multmaster system with multiple CPUs and multiple TCA9534s.

Thank you very much in advance.

Best,

Needhu

over 6 years ago

0 BOBBY over 6 years ago

TI__Mastermind 49070 points

Hey Needhu,
Unfortunately our team (TRX) does not focus on the embedded processing side of the products. We mainly support the analog side (schematic questions, why does our waveform look like this, ect.)

TI does have a division solely focusing on embedded processing (coding included) but for the MSP430 devices. If the customer is using an MSP430 or a TI processor, they would be able to provide the support you need.

Sorry I can't do more for you here,
-Bobby

0 Needhu Gunasegaran over 6 years ago in reply to BOBBY

TI__Intellectual 2710 points

Hi Bobby,

Can we move this post to C2000 group? They are using C2000 for the embedded processing.

Thank you for the feedback.

Best,

Needhu

0 Needhu Gunasegaran over 6 years ago in reply to Needhu Gunasegaran

TI__Intellectual 2710 points

Team,

Can you help me with this customer question.

Thank you.

-Needhu

0 Manoj Santha Mohan over 6 years ago

TI__Guru 55700 points

Needu,

Which MCU are you working with ?

Regards,
Manoj

0 Needhu Gunasegaran over 6 years ago in reply to Manoj Santha Mohan

TI__Intellectual 2710 points

Hi Manoj,

F28075 is the MCU that the customer are working with.

Thank you.

-Needhu

0 Manoj Santha Mohan over 6 years ago

TI__Guru 55700 points

Needhu,

As you said, we don't have an example exclusively for TCA9534. If you can explicitly tell the problem you are facing we can try to address it. I get a feeling that you are able to talk to TCA9534 with "repeated start". Why do you have to issue I2C reset to reactivate?

Regards,
Manoj

0 Needhu Gunasegaran over 6 years ago in reply to Manoj Santha Mohan

TI__Intellectual 2710 points

Hello Monoj,

please find the feedback from my customer.

thanks for your reply. The two urgent questions are the following:
1. We need a detailed description or source code of the multimaster mode. Especially information about the "arbitration lost" Bit handling is very appreciated.
2. Between two transfers I switch off the I2C hardware with "I2cRegs.I2CMDR.bit.IRS ". It works fine for me but is it allowed to do that ?

Thank you.

-Needhu

0 Needhu Gunasegaran over 6 years ago in reply to Needhu Gunasegaran

TI__Intellectual 2710 points

Manoj,

Do you have a feedback for me?

Thank you.

0 Manoj Santha Mohan over 6 years ago in reply to Needhu Gunasegaran

TI__Guru 55700 points

Needhu,

We unfortunately don't have any code template to share with you. Based on your messages, I get a feeling that you have the I2Cs working in multi-master setup. You don't need to reset the I2C between read and write access. I don't understand why you have to reset the I2C module between transfers. May be I'm missing some information.

From F28075 perspective, all you need to do is configure I2C in master mode (when working in multi master mode). I2C bus arbitration should be automatically taken care of by the I2C peripheral. In short, when two (or) more I2C masters start transmission on the I2C bus simultaneously. The I2C master which holds the SDA line low for longer time wins the arbitration. When the I2C master loses arbitration, it automatically switches to slave-receiver mode and sets the arbitration lost bit (I2CSTR.ARBL). This is explained in detail in F28075 TRM in Clock Synchronization and Arbitration section of I2C chapter.

I2CMDR.RM = 1 activates repeated start mode.

Regards,

Manoj

0 Frank Seidel over 6 years ago in reply to Manoj Santha Mohan

Prodigy 70 points

Hello Manoj,

I'm the costumer with the issues Nedhu was talking about. Is it OK to you to take a look at the code and gave me some advices as expert?

The code is working fine but I need to know how good and reliable these driver functions are..

Thanks so far

Frank

0 Manoj Santha Mohan over 6 years ago in reply to Frank Seidel

TI__Guru 55700 points

Frank,

Sorry, I would be happy to answer specific question about peripheral function. But, I can't review your code.

Regards,
Manoj

0 Frank Seidel over 6 years ago in reply to Manoj Santha Mohan

Prodigy 70 points

Manoj,

don't worry the code itself is very small and the only thing I need to know why do I have to reset the I2C unit between transfers. I'm back to to office next year

Good luck, till next year

Regards

Frank

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TCA9534: Implementation of I2C Driver