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TMDSHVPSFBKIT: PCMC, porting DPL-ISR to modern hardware capabilities

Part Number: TMDSHVPSFBKIT
Other Parts Discussed in Thread: TMS320F28027, TMS320F280049

Hi there,

I'd like to port Peak Current Mode Control interrupt routine to C language. However, as far as I know, TMS320F28027 doesn't have a lot of features (such as action qualifier shadowing) that TMS320F280049 does, so there's a dirty hack in form of number of NOPs in assembly routine.

How can I reconfigure EPWM and CMPSS peripheral so I can avoid such "time critical" routines?

I found this answer, however, no examples were actually released.

So, my questions, line by line

	MOV 	@_Comp1Regs.DACCTL, #4	 
	MOV 	@_Comp1Regs.DACCTL, #5	

What's the purpose of two sequential writes to the configuration register? Does RAMP generator performs restart by toggling CMPDACCTL.DACSOURCE bit from low to high? Could this code be replaced with automatic ramp restart with PWM event?

		MOV		@_EPwm4Regs.AQCTLA, #0x0016
		MOV		@_EPwm4Regs.AQCTLB, #0x0001

		NOP
		; bunch of ugly NOPs here
		NOP

		MOV		@_EPwm4Regs.AQCTLA, #0x0014		

Does that mean, that I can disable shadow load for AQCTLA, write 0x0016, then enable shadow load for AQCTLA and write 0x0014 without need for waiting?

		OR		@_EPwm2Regs.TZCLR, #0x4			
		MOV	@_EPwm2Regs.TZCTL, #0x0FFE

Does trip zone status should actually be cleared after action qualifier reconfiguration? If AQCTL register has already shadow write, can I simply clear status bits?

Thanks