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CCS/TMS320F280049M: TMS320F280049: How to set "Zero Boot Mode Select Pins"

Johnny Shih
Intellectual 535 points
Part Number: TMS320F280049M


Tool/software: Code Composer Studio

Dear TI team,

The document sprui33a.pdf  (TMS320F28004x_Technical Reference Manual) section 4.3.3.1 Zero Boot Mode Select Pins

Please let me know how to configure it as below (section 4.3.3.1 Zero Boot Mode Select Pins), I want to boot to flash without any external pull-up pin.

1. Program the BOOTPIN_CONFIG location in OTP as follows:
• Set BOOTPIN_CONFIG.BMSP0 to 0xFF
• Set BOOTPIN_CONFIG.BMSP1 to 0xFF
• Set BOOTPIN_CONFIG.BMSP2 to 0xFF
• Set BOOTPIN_CONFIG.KEY to 0x5A for boot ROM to treat these register bits as valid.
2. Program the BOOTDEF location options for the device. This essentially sets up a device-specific boot
mode table.
• Set BOOTDEF.BOOTDEF0 to 0x03 for booting to flash with a boot mode value of 0
• Optionally: Set BOOTDEF.BOOT_DEF0_ALT_OPTIONS to a different value to switch to one of the
available flash entry point alternatives.

  • 0
    TI__Guru 55700 points
    Shih,

    1) Program USER OTP address 0x7800C = 0xFFFF & Program USER OTP address 0x7800D = 0x5AFF

    2) Program USER OTP address 0x7801C = 0xFF03

    Regards,
    Manoj
  • 0 in reply to Manoj Santha Mohan
    Intellectual 535 points
    Dear Manoj,
    Please help check my step as below (add by me), this function the same not work:

    1. Add code in .asm file
    ***********************************************************************
    * Function: codestart section
    *
    * Description: Branch to code starting point
    ***********************************************************************

    .sect "codestart"
    .sect "OTP_KEY" ; add by me
    .int 0x5AFF ; add by me
    .sect "OTP_BMODE" ; add by me
    .int 0xFFFF ; add by me
    .sect "OTP_Boot" ; add by me
    .int 0xFF03 ; add by me
    code_start:
    ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    //========================================================================================

    2. Add code in .cmd file

    MEMORY
    {
    PAGE 0 :
    /* BEGIN is used for the "boot to Flash" bootloader mode */

    BEGIN : origin = 0x080000, length = 0x000002
    RAMM0 : origin = 0x0000F5, length = 0x00030B

    RAMLS0 : origin = 0x008000, length = 0x000800
    RAMLS1 : origin = 0x008800, length = 0x000800
    RAMLS2 : origin = 0x009000, length = 0x000800
    RAMLS3 : origin = 0x009800, length = 0x000800
    RAMLS4 : origin = 0x00A000, length = 0x000800
    RESET : origin = 0x3FFFC0, length = 0x000002

    OTP_BMODE : origin = 0x07800C, length = 0x000001 /* Add by me */
    OTP_KEY : origin = 0x07800D, length = 0x000001 /* Add by me */
    OTP_Boot : origin = 0x07801C, length = 0x000001 /* Add by me */
    ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  • 0 in reply to Johnny Shih
    TI__Guru 55700 points

    Shih,

    Did you add the following definitions in SECTIONS directive?

              SECTIONS
              {

          OTP_BMODE : > OTP_BMODE, PAGE = 0

          OTP_KEY : > OTP_KEY, PAGE = 0

          OTP_Boot: : > OTP_Boot, PAGE = 0

    }

    Regards,

    Manoj

  • 0 in reply to Manoj Santha Mohan
    Intellectual 535 points

    Dear Manoj,

    No, I am not add this function definitions in SECTIONS ,

    I am out off office this week,

    I will try it next Monday, thanks a lot for your suggest.

  • 0 in reply to Manoj Santha Mohan
    Intellectual 535 points

    Dear Manoj,

    After add definitions in SECTIONS,

    I am the same can't  into FLASH mode.

    Please help me review my "28004x_generic_flash_lnk.cmd" & "f28004x_codestartbranch.asm" source code as below:

    1. 28004x_generic_flash_lnk.cmd  =======================================================================>>

    MEMORY
    {
    PAGE 0 :
    /* BEGIN is used for the "boot to Flash" bootloader mode */

    BEGIN : origin = 0x080000, length = 0x000002
    RAMM0 : origin = 0x0000F5, length = 0x00030B

    RAMLS0 : origin = 0x008000, length = 0x000800
    RAMLS1 : origin = 0x008800, length = 0x000800
    RAMLS2 : origin = 0x009000, length = 0x000800
    RAMLS3 : origin = 0x009800, length = 0x000800
    RAMLS4 : origin = 0x00A000, length = 0x000800
    RESET : origin = 0x3FFFC0, length = 0x000002

    OTP_BMODE : origin = 0x07800C, length = 0x000001 /* Add by me */
    OTP_KEY : origin = 0x07800D, length = 0x000001 /* Add by me */
    OTP_Boot : origin = 0x07801C, length = 0x000001 /* Add by me */


    /* Flash sectors */
    /* BANK 0 */
    FLASH_BANK0_SEC0 : origin = 0x080002, length = 0x000FFE /* on-chip Flash */
    FLASH_BANK0_SEC1 : origin = 0x081000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC2 : origin = 0x082000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC3 : origin = 0x083000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC4 : origin = 0x084000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC5 : origin = 0x085000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC6 : origin = 0x086000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC7 : origin = 0x087000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC8 : origin = 0x088000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC9 : origin = 0x089000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC10 : origin = 0x08A000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC11 : origin = 0x08B000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC12 : origin = 0x08C000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC13 : origin = 0x08D000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC14 : origin = 0x08E000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK0_SEC15 : origin = 0x08F000, length = 0x001000 /* on-chip Flash */


    /* BANK 1 */
    FLASH_BANK1_SEC0 : origin = 0x090000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC1 : origin = 0x091000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC2 : origin = 0x092000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC3 : origin = 0x093000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC4 : origin = 0x094000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC5 : origin = 0x095000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC6 : origin = 0x096000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC7 : origin = 0x097000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC8 : origin = 0x098000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC9 : origin = 0x099000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC10 : origin = 0x09A000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC11 : origin = 0x09B000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC12 : origin = 0x09C000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC13 : origin = 0x09D000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC14 : origin = 0x09E000, length = 0x001000 /* on-chip Flash */
    FLASH_BANK1_SEC15 : origin = 0x09F000, length = 0x001000 /* on-chip Flash */

    PAGE 1 :

    BOOT_RSVD : origin = 0x000002, length = 0x0000F3 /* Part of M0, BOOT rom will use this for stack */
    RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */

    RAMLS5 : origin = 0x00A800, length = 0x000800
    RAMLS6 : origin = 0x00B000, length = 0x000800
    RAMLS7 : origin = 0x00B800, length = 0x000800

    RAMGS0 : origin = 0x00C000, length = 0x002000
    RAMGS1 : origin = 0x00E000, length = 0x002000
    RAMGS2 : origin = 0x010000, length = 0x002000
    RAMGS3 : origin = 0x012000, length = 0x002000
    }


    SECTIONS
    {

    codestart : > BEGIN, PAGE = 0, ALIGN(4)
    .text : >>FLASH_BANK0_SEC1 | FLASH_BANK0_SEC2 | FLASH_BANK0_SEC3, PAGE = 0, ALIGN(4)
    .cinit : > FLASH_BANK0_SEC1, PAGE = 0, ALIGN(4)
    .pinit : > FLASH_BANK0_SEC1, PAGE = 0, ALIGN(4)
    .switch : > FLASH_BANK0_SEC1, PAGE = 0, ALIGN(4)
    .reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */

    OTP_BMODE : > OTP_BMODE, PAGE = 0 /*Add by me*/
    OTP_KEY : > OTP_KEY, PAGE = 0 /*Add by me*/
    OTP_Boot :: > OTP_Boot, PAGE = 0 /*Add by me*/

    .cio : > RAMLS0, PAGE = 0
    .stack : > RAMM1, PAGE = 1
    .ebss : > RAMLS5, PAGE = 1
    .esysmem : > RAMLS5, PAGE = 1
    .econst : > FLASH_BANK0_SEC4, PAGE = 0, ALIGN(4)

    ramgs0 : > RAMGS0, PAGE = 1
    ramgs1 : > RAMGS1, PAGE = 1

    .TI.ramfunc : LOAD = FLASH_BANK0_SEC1,
    RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
    LOAD_START(_RamfuncsLoadStart),
    LOAD_SIZE(_RamfuncsLoadSize),
    LOAD_END(_RamfuncsLoadEnd),
    RUN_START(_RamfuncsRunStart),
    RUN_SIZE(_RamfuncsRunSize),
    RUN_END(_RamfuncsRunEnd),
    PAGE = 0, ALIGN(4)

    }

    2. f28004x_codestartbranch.asm =========================================================================>>

    ***********************************************************************

    WD_DISABLE .set 0 ;set to 1 to disable WD, else set to 0

    .ref _c_int00
    .global code_start

    ***********************************************************************
    * Function: codestart section
    *
    * Description: Branch to code starting point
    ***********************************************************************

    .sect "codestart"

    .sect "OTP_KEY"
    .int 0x5AFF

    .sect "OTP_BMODE"
    .int 0xFFFF

    .sect "OTP_Boot"
    .int 0xFF03


    code_start:

    .if WD_DISABLE == 1
    LB wd_disable ;Branch to watchdog disable code
    .else
    LB _c_int00 ;Branch to start of boot._asm in RTS library
    .endif

    ;end codestart section

    ***********************************************************************
    * Function: wd_disable
    *
    * Description: Disables the watchdog timer
    ***********************************************************************
    .if WD_DISABLE == 1

    .text
    wd_disable:
    SETC OBJMODE ;Set OBJMODE for 28x object code
    EALLOW ;Enable EALLOW protected register access
    MOVZ DP, #7029h>>6 ;Set data page for WDCR register
    MOV @7029h, #0068h ;Set WDDIS bit in WDCR to disable WD
    EDIS ;Disable EALLOW protected register access
    LB _c_int00 ;Branch to start of boot._asm in RTS library

    .endif

    ;end wd_disable

    .end

    ;//
    ;// End of file.
    ;//

  • 0 in reply to Johnny Shih
    TI__Guru 55700 points
    Johnny,

    I skimmed through your code. I didn't see any major issue with your .cmd / .asm file except for below line. But, it is practically difficult to review customer code line by line.

    OTP_Boot :: > OTP_Boot, PAGE = 0 /*Add by me*/

    it should be instead

    OTP_Boot : > OTP_Boot, PAGE = 0 /*Add by me*/

    Did you make sure OTP locations are programmed with right intended data to begin with?

    Regards,
    Manoj
  • 0 in reply to Manoj Santha Mohan
    Intellectual 535 points
    Dear Manoj,
    OK, Thanks a lot for your help,
    It can work now.